1. 27 Jan, 2018 2 commits
    • Stephen Boyd's avatar
      Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and... · 21170e3b
      Stephen Boyd authored
      Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next
      
      * clk-spreadtrum:
        clk: sprd: add clocks support for SC9860
        clk: sprd: Add dt-bindings include file for SC9860
        dt-bindings: Add Spreadtrum clock binding documentation
        clk: sprd: add adjustable pll support
        clk: sprd: add composite clock support
        clk: sprd: add divider clock support
        clk: sprd: add mux clock support
        clk: sprd: add gate clock support
        clk: sprd: Add common infrastructure
        clk: move clock common macros out from vendor directories
      
      * clk-mvebu-dvfs:
        clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
        clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
        clk: mvebu: armada-37xx-periph: cosmetic changes
      
      * clk-qoriq:
        clk: qoriq: add more divider clocks support
      
      * clk-imx:
        clk: imx51: uart4, uart5 gates only exist on imx50, imx53
      
      * clk-qcom-ipq8074:
        clk: qcom: ipq8074: add misc resets for PCIE and NSS
        dt-bindings: clock: qcom: add misc resets for PCIE and NSS
        clk: qcom: ipq8074: add GP and Crypto clocks
        clk: qcom: ipq8074: add NSS ethernet port clocks
        clk: qcom: ipq8074: add NSS clocks
        clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
        clk: qcom: ipq8074: add remaining PLL’s
        dt-bindings: clock: qcom: add remaining clocks for IPQ8074
        clk: qcom: ipq8074: fix missing GPLL0 divider width
        clk: qcom: add parent map for regmap mux
        clk: qcom: add read-only divider operations
      21170e3b
    • Stephen Boyd's avatar
      Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate'... · 74b48999
      Stephen Boyd authored
      Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' and 'clk-omap' into clk-next
      
      * clk-qcom-alpha-pll:
        clk: qcom: add read-only alpha pll post divider operations
        clk: qcom: support for 2 bit PLL post divider
        clk: qcom: support Brammo type Alpha PLL
        clk: qcom: support Huayra type Alpha PLL
        clk: qcom: support for dynamic updating the PLL
        clk: qcom: support for alpha mode configuration
        clk: qcom: flag for 64 bit CONFIG_CTL
        clk: qcom: fix 16 bit alpha support calculation
        clk: qcom: support for alpha pll properties
      
      * clk-check-ops-ptr:
        clk: check ops pointer on clock register
      
      * clk-protect-rate:
        clk: fix set_rate_range when current rate is out of range
        clk: add clk_rate_exclusive api
        clk: cosmetic changes to clk_summary debugfs entry
        clk: add clock protection mechanism to clk core
        clk: use round rate to bail out early in set_rate
        clk: rework calls to round and determine rate callbacks
        clk: add clk_core_set_phase_nolock function
        clk: take the prepare lock out of clk_core_set_parent
        clk: fix incorrect usage of ENOSYS
      
      * clk-omap:
        clk: ti: Drop legacy clk-3xxx-legacy code
      74b48999
  2. 22 Dec, 2017 11 commits
  3. 21 Dec, 2017 16 commits
  4. 20 Dec, 2017 9 commits
  5. 19 Dec, 2017 1 commit
    • Jerome Brunet's avatar
      clk: check ops pointer on clock register · 29fd2a34
      Jerome Brunet authored
      Nothing really prevents a provider from (trying to) register a clock
      without providing the clock ops structure.
      
      We do check the individual fields before using them, but not the
      structure pointer itself. This may have the usual nasty consequences when
      the pointer is dereferenced, most likely when checking one the field
      during the initialization.
      
      This is fixed by returning an error on clock register if the ops pointer
      is NULL.
      Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20171219083329.24746-1-jbrunet@baylibre.com
      29fd2a34
  6. 14 Dec, 2017 1 commit