1. 25 Jan, 2019 10 commits
    • Heiner Kallweit's avatar
      net: phy: warn if phy_start is called from invalid state · 21796261
      Heiner Kallweit authored
      phy_start() should be called from states PHY_READY or PHY_HALTED only.
      Check for this to detect misbehaving drivers. Also the state machine
      should be started only when being called from one of the valid states.
      
      Some more background:
      For all invalid states phy_start() basically was a no-op. All it did
      was triggering a state machine run, but for all "running" states the
      poll loop was active anyway. And if called from PHY_DOWN, the state
      machine does nothing.
      
      v3:
      - extended commit message
      Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      21796261
    • Heiner Kallweit's avatar
      net: phy: start state machine in phy_start only · a016becd
      Heiner Kallweit authored
      The state machine is a no-op before phy_start() has been called.
      Therefore let's enable it in phy_start() only. In phy_start()
      let's call phy_start_machine() instead of phy_trigger_machine().
      phy_start_machine is an alias for phy_trigger_machine but it makes
      clearer that we start the state machine here instead of just
      triggering a run.
      Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a016becd
    • Wei Yongjun's avatar
      net: stmmac: Fix return value check in qcom_ethqos_probe() · 8f4ebaaa
      Wei Yongjun authored
      In case of error, the function devm_clk_get() returns ERR_PTR() and
      never returns NULL. The NULL test in the return value check should be
      replaced with IS_ERR().
      
      Fixes: a7c30e62 ("net: stmmac: Add driver for Qualcomm ethqos")
      Signed-off-by: default avatarWei Yongjun <weiyongjun1@huawei.com>
      Acked-by: default avatarVinod Koul <vkoul@kernel.org>
      Acked-by: default avatarNiklas Cassel <niklas.cassel@linaro.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8f4ebaaa
    • Colin Ian King's avatar
      net: amd8111e: clean up two minor indentation issues · 843ef94e
      Colin Ian King authored
      Two statements are incorrecly indented, fix these by removing a space.
      Signed-off-by: default avatarColin Ian King <colin.king@canonical.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      843ef94e
    • David S. Miller's avatar
      Merge branch 'ENETC' · 556b2710
      David S. Miller authored
      Claudiu Manoil says:
      
      ====================
      Introduce ENETC ethernet drivers
      
      ENETC is a multi-port virtualized Ethernet controller supporting GbE
      designs and Time-Sensitive Networking (TSN) functionality.
      ENETC is operating as an SR-IOV multi-PF capable Root Complex Integrated
      Endpoint (RCIE).  As such, it contains multiple physical (PF) and virtual
      (VF) PCIe functions, discoverable by standard PCI Express.
      
      The patch series adds basic enablement for these otherwise standard
      buffer descriptor (BD) ring based ethernet devices (PCIe PFs and VFs),
      currently included in the 64-bit dual ARMv8 processors LS1028A SoC.
      The driver is portable to 32-bit designs, and it's independent of CPU
      endianness.
      
      Contributors:
      Alex Marginean <alexandru.marginean@nxp.com>
      Catalin Horghidan <catalin.horghidan@nxp.com>
      
      TODO list:
      * IEEE 1588 PTP support;
      * TSN support;
      * MDIO support and VF link management;
      * power management support;
      * flow control support;
      * TC offloading with h/w MQPRIO;
      * interrupt coalescing, configurable BD ring sizes, and other usual
      config options if missing.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      556b2710
    • Claudiu Manoil's avatar
      enetc: Add RFS and RSS support · d382563f
      Claudiu Manoil authored
      A ternary match table is used for RFS. If multiple entries in the table
      match, the entry with the lowest numerical values index is chosen as the
      matching entry.  Entries in the table are identified using an index
      which takes a value from 0 to PRFSCAPR[NUM_RFS]-1 when accessed by the
      PSI (PF).
      Portions of the RFS table can be assigned to each SI by the PSI (PF)
      driver in PSIaRFSCFGR.  Assignments are cumulative, the entries assigned
      to SIn start after those assigned to SIn-1.  The total assignments to
      all SIs must be equal to or less than the number available to the port
      as found in PRFSCAPR.
      
      For RSS, the Toeplitz hash function used requires two inputs, a 40B
      random secret key that is supplied through the PRSSKR0-9 registers as well
      as the relevant pieces of the packet header (n-tuple).  The 6 LSB bits of
      the hash function result will then be used as a pointer to obtain the tag
      referenced in the 64 entry indirection table.  The result will provide a
      winning group which will be used to help route the received packet.
      Signed-off-by: default avatarAlex Marginean <alexandru.marginean@nxp.com>
      Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d382563f
    • Claudiu Manoil's avatar
      enetc: Add vf to pf messaging support · beb74ac8
      Claudiu Manoil authored
      VSIs (VFs) may send a message to the PSI (PF) for general notification
      or to gain access to hardware resources which requires host inspection.
      These messages may vary in size and are handled as a partition copy
      between two memory regions owned by the respective participants.
      The PSI will respond with fail or success and a 16-bit message code.
      The patch implements the vf to pf messaging mechanism above and, as the
      first application making use of this support, it enables the VF to
      configure its own primary MAC address.
      Signed-off-by: default avatarCatalin Horghidan <catalin.horghidan@nxp.com>
      Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      beb74ac8
    • Claudiu Manoil's avatar
      enetc: Add ethtool statistics · 16eb4c85
      Claudiu Manoil authored
      This adds most h/w statistics counters: non-privileged SI conters, as
      well as privileged Port and MAC counters available only to the PF.
      Per ring software stats are also included.
      Signed-off-by: default avatarAlex Marginean <alexandru.marginean@nxp.com>
      Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      16eb4c85
    • Claudiu Manoil's avatar
      enetc: Introduce basic PF and VF ENETC ethernet drivers · d4fd0404
      Claudiu Manoil authored
      ENETC is a multi-port virtualized Ethernet controller supporting GbE
      designs and Time-Sensitive Networking (TSN) functionality.
      ENETC is operating as an SR-IOV multi-PF capable Root Complex Integrated
      Endpoint (RCIE).  As such, it contains multiple physical (PF) and
      virtual (VF) PCIe functions, discoverable by standard PCI Express.
      
      Introduce basic PF and VF ENETC ethernet drivers.  The PF has access to
      the ENETC Port registers and resources and makes the required privileged
      configurations for the underlying VF devices.  Common functionality is
      controlled through so called System Interface (SI) register blocks, PFs
      and VFs own a SI each.  Though SI register blocks are almost identical,
      there are a few privileged SI level controls that are accessible only to
      PFs, and so the distinction is made between PF SIs (PSI) and VF SIs (VSI).
      As such, the bulk of the code, including datapath processing, basic h/w
      offload support and generic pci related configuration, is shared between
      the 2 drivers and is factored out in common source files (i.e. enetc.c).
      
      Major functionalities included (for both drivers):
      MSI-X support for Rx and Tx processing, assignment of Rx/Tx BD ring pairs
      to MSI-X entries, multi-queue support, Rx S/G (Rx frame fragmentation) and
      jumbo frame (up to 9600B) support, Rx paged allocation and reuse, Tx S/G
      support (NETIF_F_SG), Rx and Tx checksum offload, PF MAC filtering and
      initial control ring support, VLAN extraction/ insertion, PF Rx VLAN
      CTAG filtering, VF mac address config support, VF VLAN isolation support,
      etc.
      Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d4fd0404
    • Tariq Toukan's avatar
      net/mlx4_core: A write memory barrier is sufficient in EQ ci update · 5e5b9f62
      Tariq Toukan authored
      Soften the memory barrier call of mb() by a sufficient wmb() in the
      consumer index update of the event queues.
      Suggested-by: default avatarEric Dumazet <edumazet@google.com>
      Signed-off-by: default avatarTariq Toukan <tariqt@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5e5b9f62
  2. 23 Jan, 2019 30 commits