- 03 Jan, 2005 40 commits
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Andi Kleen authored
Add SRAT NUMA discovery to x86-64. Previously the NUMA nodes on Opteron systems were directly read from the hardware registers of the northbridge. This version also supports reading it from the more generic ACPI SRAT table. This allows to support NUMA on all kinds of systems and in general gives more flexibility, but needs a bit of BIOS support. This implementation was not done before because the SRAT specification had a bad license from Microsoft that didn't allow to implement it on other OS. Now that ACPI 3.0 is released and SRAT is part of it that isn't a concern anymore. One side effect of this is that holes not described in SRAT (e.g. usually the 640K DOS and 4GB PCI memory holes) will not included in the nodes and won't get mem_map entries allocated. This may have side effects for some drivers. Some support for handling dual core AMD CPUs is included. SLIT parsing is done in a later patch. Depends on earlier patches to split up the ACPI boot parsing and to add better CMP support on x86-64. Can be disabled with numa=noacpi Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Split ACPI boot table parsing Split ACPI boot table parsing into two parts. First a acpi_boot_table_init() call that initializes the basic ACPI table parsing machinery and discovers the RSDP, and then another call to actually parse the various boot tables. This is needed for a followon patch that implements SRAT support, because nodes need to be set up before the other ACPI tables can be parsed. On x86-64 I moved the early initialization very early because that is needed for the SRAT parser. On i386 it should be a nop. Signed-off-by:
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Andi Kleen authored
Handle NX correctly in pageattr Second attempt to try to fix an long standing NX bug in change_page_attr. Hopefully this version will be better. The kernel text mapping aliases part of the physical memory and needs its caching attributes changed too. But when doing this one has to be very careful to handle the NX bit correctly. A previous slightly different version of this broke the X server on some RH systems. I hope this version will be better, but if you have X server problems please revert this one. Signed-off-by:
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Andi Kleen authored
Collected ioremap fixes - Call change_page_attr correctly - Fix a race during iounmap - Handle mmio holes without mem_map correctly (needed for SRAT patch) - Some cleanups Signed-off-by:
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Andi Kleen authored
Add reboot=force reboot=force doesn't wait for any other CPUs on reboot. This is useful when you really need a system to reboot on its own. Signed-off-by:
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Andi Kleen authored
Remove BIOS reboot code Remove the never quite working BIOS reboot code. This gets rid of a lot of code. Signed-off-by:
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Andi Kleen authored
Remove duplicated FAKE_STACK_FRAME macro. FAKE_STACK_FRAME macro is defined twice. The one that gets used is in arch/x86_64/kernel/entry.S, and is slightly different codewise, although should have the same end result (uses pushq rather than addq %rsp + movq and has the extra dwarf annotations). Signed-off-by:
Chris Wright <chrisw@osdl.org> Signed-off-by:
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Andi Kleen authored
Reenable MGA DRI on x86-64 Has been reported as working. Signed-off-by:
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Badari Pulavarty authored
Problem is with "c - cpu_data" arthimetic. "c" could be "boot_cpu_data" or "cpu_data". Signed-off-by:
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Andi Kleen authored
Fix bugs in the AMD K8 CMP support code. Check the correct cpuid level and move numa_add_cpu to the correct place. Signed-off-by:
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Andi Kleen authored
Add a real pfn_valid This adds a real pfn_valid. Needed together with the SRAT patch which can generated memmap less holes for mmio. In general it will help to handle memory holes better. Signed-off-by:
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Prasanna S. Panchamukhi authored
This patch adds the return value check for the exception notifiers at do_general_protection as pointed out by Chuck Ebbert. Signed-off-by:
Prasanna S Panchamukhi <prasanna@in.ibm.com> Signed-off-by:
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Zwane Mwaikambo authored
Patch adds support for notification of overheating conditions on intel x86_64 processors. Tested on EM64T, test booted on AMD64. Hardware courtesy of Intel Corporation Signed-off-by:
Zwane Mwaikambo <zwane@linuxpower.ca> Signed-off-by:
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H. Peter Anvin authored
This patch exports to userspace the boot loader ID which has been exported by (b)zImage boot loaders since boot protocol version 2. It is needed so that update tools that update kernels from vendors know which bootloader file they need to update; eg right now those tools do all kinds of hairy heuristics to find out if it's grub or lilo or .. that installed the kernel. Those heuristics are fragile in the presence of more than one bootloader (which isn't that uncommon in OS upgrade situations). Tested on i386 and x86-64; as far as I know those are the only architectures which use zImage/bzImage format. Signed-Off-By:
H. Peter Anvin <hpa@zytor.com> Signed-off-by:
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H. Peter Anvin authored
This patch adds some i386 boot loader IDs that were used but never officially recorded as assigned. This makes them nice and official. Signed-Off-By:
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Vivek Goyal authored
This patch fixes the problem of secondary cpus not coming up over a reboot. This problem was seen when a kernel compiled for non default (16MB) location is booted. Signed-off-by:
Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by:
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Dave Hansen authored
This function is unused on i386. Signed-off-by:
Dave Hansen <haveblue@us.ibm.com> Signed-off-by:
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H. Peter Anvin authored
Signed-off-by:
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Zwane Mwaikambo authored
Booting with NX, CONFIG_X86_PAE and CONFIG_DEBUG_PAGEALLOC or mem=nopentium triple faults really early during boot as it appears to be tripping over pages from PAGE_OFFSET -> PAGE_OFFSET + 0x100000 not being marked as executable. Signed-off-by:
Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by:
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Zwane Mwaikambo authored
This patch is for the following bug, thanks to Ondrej Zary for reporting, testing and submitting a patch. http://bugzilla.kernel.org/show_bug.cgi?id=3767 It appears that the Cyrix MII won't touch %ecx at all resulting in stale data being returned as extended attributes, so clear ecx before issuing the cpuid. I have also made the capability print code display all the capability words for easier debugging in future. Signed-off-by:
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Venkatesh Pallipadi authored
The setup.S data and code is not cleanly separated. The current space reserved for setup header is not enough to fit the complete header. As a result, part of the header (EDDBUF) will overwrite the initial code. I haven't seen any negative impact of this bug. As, by the time the setup code is overwritten, we would have finished executing it anyway. But, I think it is better to separate the header and code and prevent this data_overwriting_the_code condition. The atatched patch adds some space in the header to fit all the data listed in Documentation/i386/zero-page.txt for both i386 and x86_64 (and updates zero-page.txt). Signed-off-by:
: "Venkatesh Pallipadi" <venkatesh.pallipadi@intel.com> Signed-off-by:
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Martin J. Bligh authored
Badari hit a problem when configuring PAE off (ie CONFIG_4G) where the pkmap area could end up overlapping the fixmap area. For some reason, PKMAP_BASE was defined statically, which seems rather pointless, and asking for trouble. Patch below definines it dynamically, under the fixmap area. The ordering of the VMALLOC_RESERVE space is: FIXADDR_TOP fixed_addresses FIXADDR_START temp fixed addresses FIXADDR_BOOT_START Persistent kmap area PKMAP_BASE VMALLOC_END Vmalloc area VMALLOC_START high_memory Signed-off-by:
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David Howells authored
The attached patch fixes the IDE driver to initialise correctly in the case that IDE_ARCH_OBSOLETE_INIT is not defined. Not defining this macro would seem to be the correct thing to do since it includes the word "obsolete" in its name. Signed-Off-By:
David Howells <dhowells@redhat.com> Signed-off-by:
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David Howells authored
The attached patch creates a generic set of termio userspace access functions with proper error handling. None of the current archs check for errors in this case. Signed-Off-By:
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Ananth N. Mavinakayanahalli authored
Here is a patch that adds a wrapper for defining jprobe.entry to make t easy to handle the three dword function descriptors defined by the PowerPC ELF ABI. x86, ppc64 and x86_64 are also updated. Signed-off-by:
Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by:
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David Gibson authored
Currently the ppc64 sysfs code registers an entry for each possible cpu in sysfs, rather than just online cpus. That makes sense, since the sysfs entries are needed to control onlining of the cpus. However, this is done even if CONFIG_HOTPLUG_CPU is not set, or if it is not a hotplug capable (DLPAR) machine, which is a bit misleading. Secondly it also registers all the other sysfs entries (mostly performance monitoring controls) on all possible cpus, although they are quite meaningless on non-online cpus. This patch alters the code to only register sysfs directories at boot for cpus which are either online or could be onlined (cpu is possible, and CONFIG_HOTPLUG_CPU and an lpar machine). Furthermore, the entries apart from 'online' itself and 'physical_id' are only registered for online CPUs (and deregistered again if a cpu goes offline). Currently the ppc64 sysfs code registers an entry for each possible cpu in sysfs, rather than just online cpus. That makes sense, since the sysfs entries are needed to control onlining of the cpus. However, this is done even if CONFIG_HOTPLUG_CPU is not set, or if it is not a hotplug capable (DLPAR) machine, which is a bit misleading. Secondly it also registers all the other sysfs entries (mostly performance monitoring controls) on all possible cpus, although they are quite meaningless on non-online cpus. This patch alters the code to only register sysfs directories at boot for cpus which are either online or could be onlined (cpu is possible, and CONFIG_HOTPLUG_CPU and an lpar machine). Furthermore, the entries apart from 'online' itself and 'physical_id' are only registered for online CPUs (and deregistered again if a cpu goes offline). Signed-off-by:
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Ananth N. Mavinakayanahalli authored
Kprobes (Kernel dynamic probes) is a lightweight mechanism for kernel modules to insert probes into a running kernel, without the need to modify the underlying source. The probe handlers can then be coded to log relevent data at the probe point. More information on kprobes can be found at: http://www-124.ibm.com/developerworks/oss/linux/projects/kprobes/ Jprobes (or jumper probes) is a small infrastructure to access function arguments. It can be used by defining a small stub with the same template as the routine in kernel, within which the required parameters can be logged. Signed-off-by:
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Arthur Othieno authored
Documentation/powerpc/cpu_features.txt mysteriously disappeared sometime when 2.5 forked off. Searching through BK logs on linux.bkbits.net didn't reveal anything, unfortunately. The only reference I could pick up from searching the available lkml archives is the 2.4.20-pre11 ChangeLog where this was first merged. Thus far, nothing indicates it was intentionally removed, and AFAICS, is still up to date with the current code. Signed-off-by:
Arthur Othieno <a.othieno@bluewin.ch> Signed-off-by:
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Matt Porter authored
Fixes io_remap_page_range() to use the 32-bit address translator similar to ioremap(). Someday u64 start/end resources should make this unnecessary. Fixes set_pte() to handle a long long pte_t properly. Signed-off-by:
Matt Porter <mporter@kernel.crashing.org> Signed-off-by:
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Matt Porter authored
We'd like to get a uImage when just using 'make' on many targets. After some discussion, it made sense to simply add uImage to the default targets since it adds minimal build overhead and will work on all platforms. Also, fix a dependency in the boot stuff. Signed-off-by:
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Corey Minyard authored
Add a debugging interface for PowerPC that allows signal handlers (or any jump to a context, really) to perform debug functions. It allows the a user program to turn on single-stepping, for instance, and the thread will get a trap after executing the next instruction. It can also (on supported PPC processors) turn on branch tracing and get a trap after the next branch instruction is executed. This is useful for in-application debugging. Note that you can enable single-stepping on x86 processors directly from signal handlers. Newer x86 processors have the equivalent of a branch-trace bit in the IA32_DEBUGCTL MSR and could have similar function to this syscall. Most other processors could benefit from a similar interface, except for ARM which is extraordinarily broken for debugging. Future uses of this could be adding the ability to set the hardware breakpoint registers from a signal handler. Signed-off-by:
Corey Minyard <minyard@mvista.com> Signed-off-by:
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Matt Porter authored
This trivial patch removes long-standing typo in ibm44x.h. In fact, we already have correct DCRN_CPC0_GPIO define later in the same file. Signed-off-by:
Eugene Surovegin <ebs@ebshome.net> Signed-off-by:
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Matt Porter authored
This patch removes annoying warnings in ebony.c. Fix is similar to one I made in ocotea.c before. Signed-off-by:
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Kumar Gala authored
Remove prototypes and externs out of the .c files Signed-off-by:
Andy Fleming <afleming@freescale.com> Signed-off-by:
Kumar Gala <kumar.gala@freescale.com> Signed-off-by:
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Kumar Gala authored
Adds oprofile support for the e500 PowerPC core. Signed-off-by:
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Matt Porter authored
Patch from Eugene to do some cleanup of the PPC4xx PIC code. Separates the interrupts that can have polarity/triggering modified for platform modification if necessary. Between the two of us, it's tested on most of the affected platforms. Signed-off-by:
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Randy Vinson authored
I've added support for the IBM 750FX and 750GX Eval Boards (Chestnut/Buckeye). Signed-off-by:
Randy Vinson <rvinson@mvista.com> Signed-off-by:
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Mark A. Greer authored
This patch adds support for the Artesyn Katana 750i, 752i, and 3750. Signed-off-by:
Mark A. Greer <mgreer@mvista.com> Signed-off-by:
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Mark A. Greer authored
This patch adds support for the Force CPCI-690 cPCI board. Signed-off-by:
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Mark A. Greer authored
This patch adds support for a line of evaluation platforms from Marvell that use the Marvell GT64260[ab] host bridges. This patch depends on the Marvell host bridge support patch (mv64x60). Signed-off-by:
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