- 15 Dec, 2015 40 commits
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Vladimir Zapolskiy authored
Remove mach/irq.h from the list of included headers, there is no compilation dependency on this include file, and the change is needed to prevent a compilation failure, when mach/irq.h is removed. Additionally remove other unneeded includes and sort out their order. Signed-off-by:
Vladimir Zapolskiy <vz@mleia.com> Signed-off-by:
Felipe Balbi <balbi@ti.com>
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Felipe Balbi authored
struct usb_request have 3 flags which might be important to know about during debug. This patch shows each of the 3 flags as a single letter: z -> for zero s -> short not okay i -> interrupt A capital letter means the feature is enabled while a lower case letter means it is disabled; Thus 'zsI' indicates that a ZLP is not needed, that we can accept a short packet and interrupt for this request should be enabled. Signed-off-by: -
Felipe Balbi authored
So far, dwc3 has always missed request->zero handling for every endpoint. Let's implement that so we can handle cases where transfer must be finished with a ZLP. Note that dwc3 is a little special. Even though we're dealing with a ZLP, we still need a buffer of wMaxPacketSize bytes; to hide that detail from every gadget driver, we have a preallocated buffer of 1024 bytes (biggest bulk size) to use (and share) among all endpoints. Reported-by:
Ravi B <ravibabu@ti.com> Signed-off-by:
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Rasmus Villemoes authored
This file already uses pr_debug in a few places; this converts the remaining printks. Signed-off-by:
Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by:
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Douglas Anderson authored
In general it is wise to clear interrupts before processing them. If you don't do that, you can get: 1. Interrupt happens 2. You look at system state and process interrupt 3. A new interrupt happens 4. You clear interrupt without processing it. This patch was actually a first attempt to fix missing device insertions as described in (usb: dwc2: host: Fix missing device insertions) and it did solve some of the signal bouncing problems but not all of them (which is why I submitted the other patch). Specifically, this patch itself would sometimes change: 1. hardware sees connect 2. hardware sees disconnect 3. hardware sees connect 4. dwc2_port_intr() - clears connect interrupt 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() ...to: 1. hardware sees connect 2. hardware sees disconnect 3. dwc2_port_intr() - clears connect interrupt 4. hardware sees connect 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() ...but with different timing then sometimes we'd still miss cable insertions. In any case, though this patch doesn't fix any (known) problems, it still seems wise as a general policy to clear interrupt before handling them. Note that for dwc2_handle_usb_port_intr(), instead of moving the clear of PRTINT to the beginning of the function we remove it completely. The only way to clear PRTINT is to clear the sources that set it in the first place. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Douglas Anderson authored
The dwc2_hcd_reset_func() function is only ever called directly by a delayed work function. As such no locks are already held when the function is called. Doing a read-modify-write of CPU registers and setting fields in the main hsotg data structure is a bad idea without locks. Let's add locks. The bug was found by code inspection only. It turns out that the dwc2_hcd_reset_func() is only ever called today if the "host_support_fs_ls_low_power" parameter is enabled and no code in mainline enables that parameter. Thus no known issues in mainline are fixed by this patch, but it's still probably wise to fix the function. Signed-off-by:
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Bin Liu authored
Some USB phy drivers have different handling for the controller in each dr_mode. But the phy driver does not have visibility to the dr_mode of the controller. This adds an api to return the dr_mode of the controller which associates the given phy node. Signed-off-by:
Bin Liu <b-liu@ti.com> Signed-off-by:
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Peter Chen authored
Since now, we may have more than one request during the test, and it is better we just quit once the error occurs instead of try queueing further requests. Signed-off-by:
Peter Chen <peter.chen@freescale.com> Suggested-by:
Krzysztof Opasiak <k.opasiak@samsung.com> Reviewed-by:
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Igor Kotrasinski authored
Since composite now overwrites bcdUSB for any gadget, remove setting it in legacy gadgets. All legacy gadgets set 0x0200, the same as the value additionally set by composite, so there is no behaviour change. Signed-off-by:
Igor Kotrasinski <i.kotrasinsk@samsung.com> Rebase onto current balbi/next Signed-off-by:
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Douglas Anderson authored
In some cases, like when you've got a "Microsoft Wireless Keyboard 2000" connected to dwc2 with a hub, expected that we'll get some transfer errors sometimes. The controller is expected to try at least 3 times before giving up. See figure "Figure A-67. Normal HS CSPLIT 3 Strikes Smash" in the USB spec. The dwc2 controller has a way to support this by using the "EC_MC" field. The Raspberry Pi driver has logic for setting this right. See fiq_fsm_queue_split_transaction() in their "dwc_otg_hcd.c". Let's use the same logic. After making this change, we no longer get dropped characters from the above mentioned keyboard. Other devices on the same bus as the keyboard also behave more properly. Thanks for Julius Werner for the expert analysis and suggestions. Acked-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
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Douglas Anderson authored
If you've got your interrupt signals bouncing a bit as you insert your USB device, you might end up in a state when the device is connected but the driver doesn't know it. Specifically, the observed order is: 1. hardware sees connect 2. hardware sees disconnect 3. hardware sees connect 4. dwc2_port_intr() - clears connect interrupt 5. dwc2_handle_common_intr() - calls dwc2_hcd_disconnect() Now you'll be stuck with the cable plugged in and no further interrupts coming in but the driver will think we're disconnected. We'll fix this by checking for the missing connect interrupt and re-connecting after the disconnect is posted. We don't skip the disconnect because if there is a transitory disconnect we really want to de-enumerate and re-enumerate. Notes: 1. As part of this change we add a "force" parameter to dwc2_hcd_disconnect() so that when we're unloading the module we avoid the new behavior. The need for this was pointed out by John Youn. 2. The bit of code needed at the end of dwc2_hcd_disconnect() is exactly the same bit of code from dwc2_port_intr(). To avoid duplication, we refactor that code out into a new function dwc2_hcd_connect(). Signed-off-by:
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Zhangfei Gao authored
Support hisilicon,hi6220-usb for HiKey board Acked-by:
Rob Herring <robh@kernel.org> Acked-by:
Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by:
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Gregory Herrero authored
Kmem caches help to get correct boundary for descriptor buffers which need to be 512 bytes aligned for dwc2 controller. Two kmem caches are needed for generic descriptors and for hs isochronous descriptors which doesn't have same size. Acked-by:
Gregory Herrero <gregory.herrero@intel.com> Signed-off-by:
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Mian Yousaf Kaukab authored
Masks for HCDMA.CTD and HCDMA.DMAAddr are incorrect. As we always start from first descriptor, no need to mask the address anyway. Acked-by:
Mian Yousaf Kaukab <yousaf.kaukab@intel.com> Signed-off-by:
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Gregory Herrero authored
Use Streaming DMA mappings to handle cache coherency of frame list and descriptor list. Cache are always flushed before controller access it or before cpu access it. Acked-by:
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Mian Yousaf Kaukab authored
As descriptor dma mode does not support split transfers, it can't be enabled for high speed devices. Add a core parameter to enable it for full speed devices. Ensure frame list and descriptor list are correctly freed during disconnect. Acked-by:
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Deepa Dinamani authored
timeval is deprecated and not y2038 safe. Its size also changes according to 32 bit/ 64 bit compilation. Replace it with 32 and 64 bit versions of its individual fields, giving two ioctls with different code values. The two ioctls are necessary to maintain the 32 bit and 64 bit userspace compatibility with a 64/32 bit kernel. Change unsigned to __u32 types for a definitive userspace interface. This is in accordance with the psABI that the unsigned type is always 32 bits. Also use motonic timer instead of real time to ensure positive delta values. Refactor usbtest_ioctl for readability to isolate the handling of the testing timing measurement. The official testusb userspace tool can be changed in a separate patch to reflect the __u32 changes as well. It can use the usbtest_param_32 struct, since 32 bit seconds is long enough for test durations. Reviewed-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Deepa Dinamani <deepa.kernel@gmail.com> Signed-off-by:
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Felipe F. Tonello authored
Remove unnecessary headers and variables. Reviewed-by:
Robert Baldyga <r.baldyga@samsung.com> Signed-off-by:
Felipe F. Tonello <eu@felipetonello.com> Signed-off-by:
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Felipe F. Tonello authored
This function is shared between gadget functions, so this avoid unnecessary duplicated code and potentially avoid memory leaks. Reviewed-by:
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Felipe F. Tonello authored
This code is duplicated from f_midi_start_ep(midi, f, midi->out_ep). Reviewed-by:
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Peter Chen authored
Add both bulk and iso depth of queue entries. Signed-off-by:
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Yoshihiro Shimoda authored
This patch modifies the ep.caps.type_{iso,bulk,int} setting and the second argument of usb_ep_maxpacket_limit() using the dparam.pipe_configs. In the previous code, all the type_{iso,bulk,int} were set to true. However, to avoid waste time for finding suitable pipe in usb_ep_enable(), this driver should set correct type. Also the second argument of usb_ep_maxpacket_limit() was set to 512 even if the pipe is isochronous or interrupt. So, this driver could not bind a gadget driver like the g_audio driver. Signed-off-by:Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by:
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Yoshihiro Shimoda authored
The current code has info->bufnmb_last to calculate the BUFNMB bits of PIPEBUF register. However, since the bufnmb_last is initialized in the usbhs_pipe_init() only, this driver is possible to set unexpected value to the register if usb_ep_{enable,disable}() are called many times. So, this patch modifies the pipe configuration via struct renesas_usbhs_driver_param to simplify the code. Also this patch changes: - a double buffer configuration - isochronous buffer size from 512 to 1024 Signed-off-by: -
Gregory Herrero authored
Process all completed urbs, if more urbs are complete by the time driver processes completion interrupt. Acked-by:
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Gregory Herrero authored
When releasing a channel, increment hsotg->available_host_channels even in case a periodic channel is released. Acked-by:
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Gregory Herrero authored
Isochronous descriptor is currently programmed for the frame after the last descriptor was programmed. If the last descriptor frame underrun, then current descriptor must take this into account and must be programmed on the current frame + 1. This overrun usually happens when system is loaded and dwc2 can't init descriptor list in time. Acked-by:
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Gregory Herrero authored
This function allow comparing frame index used for descriptor list which has 64 entries. Acked-by:
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Gregory Herrero authored
Prevent dwc2 driver from accessing channel while it frees it. Acked-by:
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Gregory Herrero authored
When completing non isoc xfer, dwc2_complete_non_isoc_xfer_ddma() is relying on qtd->n_desc to process the corresponding number of descriptors. During the processing of these descriptors, qtd could be unlinked and freed if xfer is done and urb is no more in progress. In this case, dwc2_complete_non_isoc_xfer_ddma() will read again qtd->n_desc whereas qtd has been freed. This will lead to unpredictable results since qtd->n_desc is no more valid value. To avoid this error, return a result != 0 in dwc2_process_non_isoc_desc(), so that dwc2_complete_non_isoc_xfer_ddma() stops desc processing. This has been seen with Slub debug enabled. Acked-by:
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Gregory Herrero authored
When a channel is halted because of urb dequeue during transfer completion, no other qtds must be scheduled until halt is done. Moreover, all in progress qtds must be given back. Acked-by:
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Gregory Herrero authored
Active bit must be enabled in all scheduled descriptors. Else transfer never start. Remove previous code which was not correctly configuring descriptors. Active bit was set before calling dwc2_fill_host_isoc_dma_desc() which is erasing dma_desc->status. Acked-by:
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Gregory Herrero authored
Increment qtd->isoc_frame_index_last before testing it, else below check will never be true and IOC (Interrupt On Complete) bit for last frame will never be set in descriptor status. /* Set IOC for each descriptor corresponding to last frame of URB */ if (qtd->isoc_frame_index_last == qtd->urb->packet_count) dma_desc->status |= HOST_DMA_IOC; Acked-by:
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Peter Chen authored
Now the function of complicated_callback is not only used for iso transfer, improve the error message to reflect it. Signed-off-by:
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Peter Chen authored
Add both bulk and iso depth of queue for sourcesink. Reviewed-by:
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Peter Chen authored
Add queue depth for both iso and bulk transfer, with more queues, we can do performance and stress test using sourcesink, and update g_zero accordingly. Reviewed-by:
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Felipe Balbi authored
Now that we have a generic dwc3-of-simple.c, we can use that instead of maintaining dwc3-qcom.c which is extremely similar. Cc: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: -
Subbaraya Sundeep Bhatta authored
This patch adds binding doc for Xilinx DWC3 glue driver. Acked-by:
Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Signed-off-by:
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Felipe Balbi authored
For simple platforms which merely enable some clocks and populate its children, we can use this generic glue layer to avoid boilerplate code duplication. For now this supports Qcom and Xilinx, but if we find a way to add generic handling of regulators and optional PHYs, we can absorb exynos as well. Tested-by:
Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com> Signed-off-by:
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Felipe Balbi authored
It just ocurred to me that dwc3 already gives a really hint of when a setup packet is pending and that's the SETUP_PENDING TRB Status for EP0 IRQs. Fix setup_packet_pending initialization based on that. While at that, also make sure the comment in gadget.c matches what code is doing. Signed-off-by: -
Felipe Balbi authored
In dwc3_cleanup_done_reqs() we expect that all iterations of our while (1) loop will find a valid struct dwc3_request *. In case we don't, we're dumping a WARN_ON_ONCE() splat so that people report the failure. This patch is a simple cleanup converting: if (!req) { WARN_ON_ONCE(1); return 1; } to: if (WARN_ON_ONCE(!req)) return 1; which is a little easier to read. Signed-off-by:
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