- 15 Nov, 2018 18 commits
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Xiang Chen authored
If INT_COAL_EN is enabled, configure time and count of interrupt coalescing. Then if CQ collects count of CQ entries in time, it will report the interrupt. Or if CQ doesn't collect enough CQ entries in time, it will report the interrupt at timeout. As all the registers are not supported to be changed dynamically, we need to config those register between disable and enable PHYs. Signed-off-by:
Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by:
John Garry <john.garry@huawei.com> Signed-off-by:
Martin K. Petersen <martin.petersen@oracle.com>
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Xiang Chen authored
If CQ_INT_CONVERGE_EN is enabled, the interrupts of all the 16 CQ queues will be reported by CQ0. So we need to change the process of CQ tasklet for this situation. Signed-off-by:
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Xiang Chen authored
Currently all the three HBA (v1/v2/v3 HW) share the same host attributes. To support each HBA having separate attributes in future, create per-HBA attributes. Signed-off-by:
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Christoph Hellwig authored
The wd719x driver currently uses a mix of the legacy PCI DMA and the generic DMA APIs. Switch it over to the generic DMA API entirely. Signed-off-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
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Christoph Hellwig authored
Add the SCB onto the scsi command allocation and use dma streaming mappings for it only when in use. This avoid possibly calling dma_alloc_coherent under a lock or even in irq context, while also making the code simpler. Thanks to Ondrej Zary for testing and various bug fixes. Signed-off-by:
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Christoph Hellwig authored
Warn on that case instead of trying to free them which would be fatal in case we actually had active ones. [mkp: typos] Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API. [mkp: s/iscsi/isci/] Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Also move the dma_get_required_mask check before actually setting the dma mask so that we don't end up with inconsistent settings in corner cases. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Also move the dma_get_required_mask check before actually setting the dma mask, so that we don't end up with inconsistent settings in corner cases. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API helper and also ensure we set the coherent mask as well in the resume path. Signed-off-by:
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Christoph Hellwig authored
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Signed-off-by:
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- 09 Nov, 2018 3 commits
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Janek Kotas authored
This patch adds a device tree platform driver for Cadence UFS Host Controller. It can be enabled with SCSI_UFS_CDNS_PLATFORM Kconfig option. Signed-off-by:
Jan Kotas <jank@cadence.com> Signed-off-by:
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Janek Kotas authored
This patch adds a DT binding documentation for Cadence UFS Host Controller. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Subhash Jadavani authored
UFS host supplies the reference clock to UFS device and UFS device specification allows host to provide one of the 4 frequencies (19.2 MHz, 26 MHz, 38.4 MHz, 52 MHz) for reference clock. Host should set the device reference clock frequency setting in the device based on what frequency it is supplying to UFS device. Signed-off-by:
Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by:
Can Guo <cang@codeaurora.org> Signed-off-by:
Sayali Lokhande <sayalil@codeaurora.org> Reviewed-by:
Evan Green <evgreen@chromium.org> Acked-by:
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- 07 Nov, 2018 19 commits
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Christoph Hellwig authored
Switch from the legacy PCI DMA API to the generic DMA API. Signed-off-by:
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Christoph Hellwig authored
We can just dma map the sense buffer passed with the scsi command, and that gets us out of the nasty business of doing dma coherent allocations from irq context. Signed-off-by:
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Christoph Hellwig authored
No need for a local cmd_done variable, and pass boolean values as bool type instead of u32. Signed-off-by:
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Christoph Hellwig authored
This also moves the optimization for builds with 32-bit dma_addr_t to the compiler (where it belongs) instead of opencoding it based on incorrect assumptions. Signed-off-by:
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Christoph Hellwig authored
CONFIG_HIGHMEM is not in fact an indicator for > 32-bit dma addressing Given that the driver is a bit weird and wants a compile time selection switch to checking CONFIG_ARCH_DMA_ADDR_T_64BIT instead. Signed-off-by:
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Christoph Hellwig authored
This also moves the optimization for builds with 32-bit dma_addr_t to the compiler (where it belongs) instead of opencoding it. Signed-off-by:
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Christoph Hellwig authored
CONFIG_HIGHMEM64 is only one (and these days unusual) way to indicate that > 32-bit dma address are possible. Replace it with a check of the dma_addr_t size. Signed-off-by:
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Christoph Hellwig authored
Signed-off-by:
Bart Van Assche <bvanassche@acm.org> Signed-off-by:
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Chengguang Xu authored
mempool_destroy() can handle NULL pointer correctly, so there is no need to check NULL pointer before calling mempool_destroy(). Signed-off-by:
Chengguang Xu <cgxu519@gmx.com> Acked-by:
Manish Rangankar <Manish.Rangankar@cavium.com> Signed-off-by:
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Chengguang Xu authored
dma_pool_destroy() can handle NULL pointer correctly, so there is no need to check NULL pointer before calling dma_pool_destroy(). Signed-off-by:
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James Smart authored
Update the driver version to 12.0.0.8 Signed-off-by:
Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by:
James Smart <jsmart2021@gmail.com> Reviewed-by:
Hannes Reinecke <hare@suse.com> Signed-off-by:
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James Smart authored
Add trunking support to the driver. Trunking is found on more recent asics. In general, trunking appears as a single "port" to the driver and overall behavior doesn't differ. Link speed is reported as an aggregate value, while link speed control is done on a per-physical link basis with all links in the trunk symmetrical. Some commands returning port information are updated to additionally provide trunking information. And new ACQEs are generated to report physical link events relative to the trunk. This patch contains the following modifications: - Added link speed settings of 128GB and 256GB. - Added handling of trunk-related ACQEs, mainly logging and trapping of physical link statuses. - Added additional bsg interface to query trunk state by applications. - Augment link_state sysfs attribtute to display trunk link status Signed-off-by:
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James Smart authored
The switches seem to respond faster to GID_PT vs GID_FT NameServer queries. Add support for GID_PT to be used over GID_FT to enable faster storage failover detection. Includes addition of new module parameter to select between GID_PT and GID_FT (GID_FT is default). Signed-off-by:
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James Smart authored
An address change for a remote port cause PRLI for the wrong protocol to be sent. The node copy done in the discovery code skipped copying the fc4 protocols supported as well. Fix the copy logic for the address change. Beefed up log messages in this area as well. Signed-off-by:
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James Smart authored
Testing a point-to-point topology and a case of re-FLOGI without intervening link bouncing, showed an odd interaction with firmware and a resulting scenario where the driver no longer probed after accepting the new FLOGI. Work around the firmware issue by issuing a link bounce if a FLOGI is received after the link is already up and FLOGI's accepted. While debugging the issue, realized that some debug traces should be clarified to help in the future. Signed-off-by:
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James Smart authored
When LCB's are rejected, if beaconing was already in progress, the Reason Code Explanation was not being set. Should have been set to command in progress. Signed-off-by:
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James Smart authored
On FCoE adapters, when running link bounce test in a loop, initiator failed to login with switch switch and required driver reload to recover. Switch reached a point where all subsequent FLOGIs would be LS_RJT'd. Further testing showed the condition to be related to not performing FCF discovery between FLOGI's. Fix by monitoring FLOGI failures and once a repeated error is seen repeat FCF discovery. Signed-off-by:
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James Smart authored
This patch corrects two issues: - An oops would occur if reading based on a non-zero offset. Offset calculation was incorrect. - Updates to ras config (logging level) were ignored if change was made while fw logging was enabled. Revise to dynamically update. Signed-off-by:
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James Smart authored
Currently, PLOGI failures are infinitely delayed/retried. There have been some fabric situations where the PLOGI's were to the nameserver and it stopped responding. The retries would never clear up. A better resolution in this situation is to retry a couple of times, then drop the link and reinit. This brings back connectivity to the nameserver. Signed-off-by:
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