- 15 Aug, 2017 40 commits
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Alex Deucher authored
Was using the wrong prefix (gmc rather than gfx). The function is related to the gfx hw, not gmc. This also makes it consistent with the naming in gfx8. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Vijendar Mukunda authored
Power Gating is disabled in Stoney platform. Reviewed-by:
Vijendar Mukunda <Vijendar.Mukunda@amd.com> Signed-off-by:
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Vijendar Mukunda authored
Added DW_I2S_QUIRK_16BIT_IDX_OVERRIDE quirk for Stoney. Supported format and bus width for I2S controller read from I2S Component Parameter registers. These are ready only registers. For Stoney, I2S Component Parameter registers are programmed to support 32 bit format and 4 bytes bus width only. By setting this quirk,It will override 32 bit format with 16 bit format and 2 bytes as bus width for Stoney. Reviewed-by:
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Evan Quan authored
Signed-off-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Huang Rui <ray.huang@amd.com> Acked-by:
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Evan Quan authored
Signed-off-by:
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Hawking Zhang authored
digest_size has been retired from sdma v4 fw Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Dan Carpenter authored
My static checker complains that it's possible for "r" to be uninitialized. It used to be set to zero so this returns it to the old behavior. Fixes: 98a7f88c ("drm/amdgpu: bind BOs with GTT space allocated directly v2") Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Rex Zhu authored
Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Rex Zhu authored
Use pr_debug to prevent spamming unimportant dmesg. Signed-off-by:
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Trigger Huang authored
If a ring is not initialized, it also should not be finished. For example, in Vega10's SR-IOV environment, UVD's decode ring is not initialized, but will be finnished in amdgpu_uvd_sw_fini, because UVD driver put all the uvd decode ring's finish operation into amdgpu_uvd_sw_fini function, while not uvd_vXXX_0_sw_fini. This will lead to amdgpu module unloading failure. Signed-off-by:
Trigger Huang <trigger.huang@amd.com> Reviewed-by:
Monk Liu <monk.liu@amd.com> Reviewed-by:
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Kent Russell authored
Change "prefered" to "preferred" Signed-off-by:
Kent Russell <kent.russell@amd.com> Reviewed-by:
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Kent Russell authored
Change "prefered" to "preferred" Signed-off-by:
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Kent Russell authored
Change "stollen" to "stolen" Signed-off-by:
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Kent Russell authored
Change "stollen" to "stolen" Signed-off-by:
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Rex Zhu authored
delete unneeded semicolon. Signed-off-by:
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Huang Rui authored
We won't use this member in other files, so set it static. Signed-off-by:
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Cihangir Akturk authored
drm_*_reference() and drm_*_unreference() functions are just compatibility alias for drm_*_get() and drm_*_put() adn should not be used by new code. So convert all users of compatibility functions to use the new APIs. Reviewed-by:
Cihangir Akturk <cakturk@gmail.com> Signed-off-by:
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Cihangir Akturk authored
drm_*_reference() and drm_*_unreference() functions are just compatibility alias for drm_*_get() and drm_*_put() and should not be used by new code. So convert all users of compatibility functions to use the new APIs. Reviewed-by:
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Alex Deucher authored
Support the profiling modes for sclk. v2: delete profileing mode for mclk. Signed-off-by:
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Rex Zhu authored
cherry-pick from windows driver. Signed-off-by:
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Rex Zhu authored
Signed-off-by:
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Rex Zhu authored
Signed-off-by:
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Alex Deucher authored
May waste a bit of memory, but simplifies the interface significantly. v2: convert internal accounting to use 256bit slots Reviewed-by:
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Jean Delvare authored
There are no external users of function amdgpu_atif_handler so it can be static. Signed-off-by:
Jean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by:
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Jean Delvare authored
There are no external users of function radeon_atif_handler so it can be static. Signed-off-by:
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Jean Delvare authored
Include a missing header to get rid of the following warning: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:65:6: warning: no previous prototype for ‘amdgpu_pm_acpi_event_handler’ [-Wmissing-prototypes] void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) ^ Signed-off-by: -
Jean Delvare authored
Include a missing header to get rid of the following warning: drivers/gpu/drm/amd/amdgpu/dce_v6_0.c:521:6: warning: no previous prototype for 'dce_v6_0_disable_dce' [-Wmissing-prototypes] void dce_v6_0_disable_dce(struct amdgpu_device *adev) ^ Signed-off-by: -
Jean Delvare authored
As I was staring at the si_init_golden_registers code, I noticed that the Pitcairn initialization silently falls through the Cape Verde initialization, and the Oland initialization falls through the Hainan initialization. However there is no comment stating that this is intentional, and the radeon driver doesn't have any such fallthrough, so I suspect this is not supposed to happen. Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
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Alex Deucher authored
Move it up before ring enablement with all of the other engine setup and explicitly disable it for bare metal. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by:
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Alex Deucher authored
We already allocate this as part of the ring structure, use that instead. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by:
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Alex Deucher authored
The wb buffer is in system memory, not vram so the flush is useless. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by:
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Alex Deucher authored
No functional change until wptr polling uses this location (future patch). v2: use WRITE_ONCE Cc: Frank Min <Frank.Min@amd.com> Reviewed-by:
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Felix Kuehling authored
kfd2kgd is device-specific, so it should not be a global variable. Merge amdgpu_amdkfd_load_interface and amdgpu_amdkfd_device_probe so that it's only needed as a local variable in one function. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by:
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Junwei Zhang authored
Signed-off-by:
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Alex Deucher authored
nbio registers are not used in this file. Reviewed-by:
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Alex Deucher authored
The gfxhub and mmhub code are now helpers for gmc rather than standalone IPs. When that changes these were left over. Remove them. Acked-by:
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Alex Deucher authored
Use a lower case b to be consistent with the other wb functions. Reviewed-by:
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Yong Zhao authored
We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by:
Yong Zhao <Yong.Zhao@amd.com> Reviewed-by:
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Yong Zhao authored
The parameter init_value contains the value to which we initialized VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set. Signed-off-by:
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Christian König authored
Saves us even more loc. Signed-off-by:
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