- 08 Aug, 2019 9 commits
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Chris Wilson authored
Ignore the central i915->kernel_context for allocating an engine, as that GEM context is being phased out. For internal clients, we just need the per-engine logical state, so allocate it at the point of use. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190808110612.23539-1-chris@chris-wilson.co.uk
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Chris Wilson authored
Modernise the mock_request factory to take intel_context not a (GEM context, intel_engine_cs) tuple. Signed-off-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190808115640.20552-1-chris@chris-wilson.co.uk
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Vandita Kulkarni authored
Blanking packet bit will control whether the transcoder allows the link to enter the LP state during BLLP regions (assuming there is enough time), or whether it will keep the link in the HS state with a Blanking Packet Signed-off-by:
Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by:
Uma Shankar <uma.shankar@intel.com> Signed-off-by:
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Vandita Kulkarni authored
Most of the functions and mipi dsi sequence remains same as of ICL for TGL. Hence extending the support to TGL. Signed-off-by:
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Vandita Kulkarni authored
For TGL, there is no need to keep DDI clock on till IO enabling for mipi dsi. Signed-off-by:
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Vandita Kulkarni authored
Do not override TA_SURE timing parameter to zero for DSI 8X frequency 800MHz or below on TGL. Signed-off-by:
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Vandita Kulkarni authored
Latency programming remains same as that of ICL and setting latency otimization for PCS_DW1 lanes is same as that of EHL, hence extending it to TGL. Signed-off-by:
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Vandita Kulkarni authored
Program vblank register for mipi dsi in video mode on TGL. Signed-off-by:
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Jani Nikula authored
Abstract the rather self-contained piece of code from i915_drv.[ch]. No functional changes. Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
José Roberto de Souza <jose.souza@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190807120415.17917-1-jani.nikula@intel.com
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- 07 Aug, 2019 25 commits
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Michal Wajdeczko authored
Insert few more failure points into firmware fetch procedure to check use of the wrong blob name or use of the mismatched firmware versions. Also update some messages (remove ptr, duplicated infos) and stop treating all fetch errors as missing firmware case. v2: update log levels (Chris) Signed-off-by:
Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
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Michal Wajdeczko authored
WOPCM programming error might be due to inserted earlier probe failure that could affects HuC firmware loading and thus impacts result of WOPCM partitioning that would be now incompatible with previously programmed values. Signed-off-by:
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Michal Wajdeczko authored
No need to define it globally as we're only using it in wopcm.c Signed-off-by:
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Michal Wajdeczko authored
For meaningful WOPCM partitioning we need GuC (and optionally HuC) firmware size(s) and we shouldn't just rely on GuC support flag, as we might fail to fetch GuC firmware and it's size will be 0 and all calculations will be just wrong/useless. Signed-off-by:
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Michal Wajdeczko authored
When we failed to fetch GuC firmware there is no point in fetching HuC firmware as we will not be able to use it without working GuC. Signed-off-by:
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Michal Wajdeczko authored
There is no point in selecting HuC firmware if GuC is unsupported or it was already disabled, as we need GuC to authenticate HuC. While around, make uc_fw_init_early work without direct access to whole i915, pass only needed platform/rev info. Signed-off-by:
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Michal Wajdeczko authored
While modparams are global for the i915 module, we are reporting status of the params applied against specific device instance. Signed-off-by:
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Umesh Nerlige Ramappa authored
The oa object manages the oa buffer and must be allocated when the user intends to read performance counter snapshots. This can be achieved by making the oa object part of the stream object which is allocated when a stream is opened by the user. Attributes in the oa object that are gen-specific are moved to the perf object so that they can be initialized on driver load. The split provides a better separation of the objects used in perf implementation of i915 driver so that resources are allocated and initialized only when needed. v2: Fix checkpatch warnings v3: Addressed Lionel's review comment v4: Rebase v5: Fix rebase/merge issue with ratelimit_state_init Signed-off-by:
Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by:
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Chris Wilson authored
This giant switch has tendrils all other the struct and does not fit in with the rest of the driver bring up and control in i915_drv.c. Push it to one side so that it can grow in peace. Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by:
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Chris Wilson authored
For forklifted frankenkernels, the reported kernel version has no bearing on the actual driver version. Include our own driver date that is updated every time we tag drm-intel-next. Signed-off-by:
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Dan Carpenter authored
There were several places which check for NULL when they should have been checking for IS_ERR(). Fixes: d8af05ff ("drm/i915: Allow sharing the idle-barrier from other kernel requests") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
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Chris Wilson authored
Use the same mechanism to determine if a backend engine exists for a uabi mapping as used internally. Signed-off-by:
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Chris Wilson authored
During engine setup, we may find that some engines are fused off causing a misalignment between internal names and the instances seen by users, e.g. (I915_ENGINE_CLASS_VIDEO_DECODE, 1) may be vcs2 in hardware. Normally this is invisible to the user, but a few debug interfaces (and our own internal tracing) use the original HW name not the name the user would expect as formed from their class:instance tuple. Replace our internal name with the uabi name for consistency with, for example, error states. v2: Keep the pretty printing of class name in the selftest Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111311Signed-off-by:
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Chris Wilson authored
We don't really want to use VM_IO for our GGTT mmaps (it implies that the mmap contains memory mapped registers, which we do not expose) yet I overzealously added it to an assert just because that's how we always had setup the vma. Signed-off-by:
Abdiel Janulgue <abdiel.janulgue@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190807094128.9993-1-chris@chris-wilson.co.uk
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Rodrigo Vivi authored
Increase abstraction of display suspend/resume operations by providing higher level functions, and hiding the details inside intel_display_power.c. v2: Make checkpatch happy: - braces {} are not necessary for single statement blocks v3: Also move hsw/bdw PC8 sequences since they are related to display PM anyways. (Ville) v4: Rebase after a long time, plus Move functions to the new intel_display_power so we can stop exporting platform specific functions as pointed by Jani. v5: Remove unnecessary braces. v6 by Jani: make this purely non-functional cleanup, make functions static Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: -
Jani Nikula authored
Move the property enums closer to home. Acually make the broadcast macros an enum while at it. Reviewed-by:
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Jani Nikula authored
With its original name intel_drv.h the intel_display_types.h header was superfluously cargo-cult included all over the place, while it's really mostly about display internals. Remove the unnecessary includes. Reviewed-by:
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Jani Nikula authored
Everything about the file is about display, and mostly about types related to display. Move under display/ as intel_display_types.h to reflect the facts. There's still plenty to clean up, but start off with moving the file where it logically belongs and naming according to contents. v2: fix the include guard name in the renamed file Reviewed-by:
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Jani Nikula authored
Disentangle i915_drv.h from intel_drv.h, which gets included via i915_trace.h. This necessitates including i915_trace.h wherever it's needed. Reviewed-by:
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Jani Nikula authored
Avoid including the intel_drv.h mega header from other header files to make further header cleanup easier. v2: restore the over-eagerly dropped <linux/types.h> (Imre) Reviewed-by:
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Jani Nikula authored
Avoid including the intel_drv.h mega header from other header files to make further header cleanup easier. Reviewed-by:
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Jani Nikula authored
No need for this function to be accessible outside of intel_bw.c. Avoid including the i915_drv.h mega header from other header files to make further header cleanup easier. Reviewed-by:
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Jani Nikula authored
Avoid including the i915_drv.h mega header from other header files to make further header cleanup easier. Reviewed-by:
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Jani Nikula authored
Avoid including the i915_drv.h mega header from other header files to make further header cleanup easier. Reviewed-by:
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Jani Nikula authored
Move the declarations of functions in intel_display.c to intel_display.h. There is still plenty of cleanup to do in intel_display.[ch], but one step at a time. Reviewed-by:
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- 06 Aug, 2019 4 commits
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Anusha Srivatsa authored
Add Support to load DMC v2.03 on TGL. v2: Use version 2.03 that is already available since that works with PSR2 Signed-off-by:Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
Matt Atwood <matthew.s.atwood@intel.com> Reviewed-by:
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Chris Wilson authored
To maintain a fast lookup from a GT centric irq handler, we want the engine lookup tables on the intel_gt. To avoid having multiple copies of the same multi-dimension lookup table, move the generic user engine lookup into an rbtree (for fast and flexible indexing). v2: Split uabi_instance cf uabi_class v3: Set uabi_class/uabi_instance after collating all engines to provide a stable uabi across parallel unordered construction. Signed-off-by:
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Chris Wilson authored
We do not notify userspace when the scheduler capabilities are changed (due to wedging the driver) and as such userspace will expect the caps to be static and unchanging. Make it so, and so we only need to compute our caps once during driver registration. Signed-off-by:
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Chris Wilson authored
As we store a pointer to i915 in the drvdata field (as the pointer is both an alias to the drm_device and drm_i915_private), we can use the stored pointer directly as the i915 device. v2: Store and use i915 inside drv_get_drvdata() v3: Only expect i915 inside drv_get_drvdata() so drop the assumed i915/drm equivalence. Signed-off-by:
Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190806074219.11043-1-chris@chris-wilson.co.uk
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- 05 Aug, 2019 2 commits
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Chris Wilson authored
The kerneldoc were stale, generating mismatching parameters warning, but furthermore they were for internal routines, not part of the MOCS interface so the instructions were superfluous. Signed-off-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190803102221.21344-1-chris@chris-wilson.co.uk
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Michal Wajdeczko authored
Since commit 301efe96 ("drm/i915/uc: Don't fail on HuC firmware failure") we can continue driver load after error during HuC firmware load or authentication, but we could still fail on any error during early HuC initialization. Change that by ignoring HuC related errors until hardware initialization phase where we can decide about next steps. Signed-off-by:
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