- 25 Nov, 2012 10 commits
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Benjamin Herrenschmidt authored
Freescale updates from Kumar
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Benjamin Herrenschmidt authored
Merge my own merge branch to get various fixes from there and upstream, especially the hvc console tty refcouting fixes which which testing is quite a bit harder...
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Gavin Shan authored
While the EEH does recovery on the specific PE that has PCI errors, the PCI devices belonging to the PE will be removed and the PE will be marked as invalid since we still need the information stored in the PE. We only invalidate the PE when it doesn't have associated EEH devices and valid child PEs. However, the code used to check that is wrong. The patch fixes that. Signed-off-by:
Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Xuelin Shi authored
The RaidEngine is a new Freescale hardware that used for parity computation offloading in RAID5/6. This patch adds the device node in device tree and related binding documentation. Signed-off-by:
Harninder Rai <harninder.rai@freescale.com> Signed-off-by:
Naveen Burmi <naveenburmi@freescale.com> Signed-off-by:
Xuelin Shi <b29237@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Varun Sethi authored
PAMU bypass enable register added to the ccsr_guts structure. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by:
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York Sun authored
ePAPR v1.1 requires the spin table to be in cached memory. So we need to change the call argument of ioremap to enable cache and coherence. We also flush the cache after writing to spin table to keep it compatible with previous cache-inhibit spin table. Flushing before and after accessing spin table is recommended by ePAPR. Signed-off-by:
York Sun <yorksun@freescale.com> Acked-by:
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Jia Hongtao authored
Power supply for PCI controller ATMU registers is off when system go to deep-sleep state. So ATMU registers should be re-setup during PCI controllers resume from sleep. Signed-off-by:
Jia Hongtao <B38951@freescale.com> Signed-off-by:
Li Yang <leoli@freescale.com> Signed-off-by:
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Timur Tabi authored
Function fsl_pcibios_fixup_bus() is available only if PCI is enabled. The MPC8610 HPCD platform file was not protecting the assigned with an #ifdef, which results in a link failure when PCI is disabled. Every other platform already has this #ifdef. Signed-off-by:
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Timur Tabi authored
The MSR[GS] bit indicates whether the kernel is running in processor guest state mode, but such a check is unnecessary. The driver already checks for the /hypervisor node and the fsl,hv-version property, so it already knows that it's running under the Freescale hypervisor. There is nothing in the driver that inherently requires guest state, anyway. This fixes a break that can occur in some randconfig builds. Signed-off-by:
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Tushar Behera authored
The third argument for of_get_property() is a pointer, hence pass NULL instead of 0. Signed-off-by:
Tushar Behera <tushar.behera@linaro.org> Signed-off-by:
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- 23 Nov, 2012 1 commit
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Alexey Kardashevskiy authored
The new EEH code introduced a small regression, if the EEH PEs are missin (which happens currently in qemu for example), it will deref a NULL pointer in the MSI code. Signed-off-by:
Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by:
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- 21 Nov, 2012 1 commit
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Benjamin Herrenschmidt authored
Anatolij 52xx updates: Patch for pcm030 device tree fixing the probe() in pcm030-audio-fabric driver. Changes to this driver have been merged in 3.7-rc1 via ASoC tree, but this required device tree patch was submitted separately to the linux-ppc list and is still missing in mainline. Without this patch the probe() in pcm030-audio-fabric driver wrongly returns -ENODEV. A patch from Wolfram fixing wrong invalid critical irq warnings for all mpc5200 boards. Another patch for all mpc5200 device trees fixing wrong L1 cell in the LPB FIFO interrupt property and moving the LPB FIFO node to the common mpc5200b.dtsi file so that this common node will be present in all mpc5200 device trees.
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- 15 Nov, 2012 28 commits
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Ian Munsie authored
Since we don't know if they new kernel we are kexecing into has been built to support relocation on exceptions, we disable them before we kexec. We do NOT disable them if we are execing a kdump kernel, because we want to change as little state as possible and it is likely that we are execing ourselves and will be able to handle them anyway. Signed-off-by:
Ian Munsie <imunsie@au1.ibm.com> Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
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Ian Munsie authored
We currently do this synchronously at boot from setup_arch. On a large system this could hypothetically take a little while to complete, so currently we will give up if we are asked to wait for more than a second in total. If we actually start hitting that timeout in practice we can always move this code into a kernel thread to take care of it in the background. Signed-off-by:
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Ian Munsie authored
I am going to use this in the next patch, better to have this code in one place rather than three. Signed-off-by:
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Ian Munsie authored
These wrappers hide the parameters that have to be passed to H_SET_MODE to enable/disable relocation on during exceptions. As noted in the comments, since these have partition wide scope, they may take some time to complete and must be periodically retried until H_SUCCESS is returned. Signed-off-by:
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Ian Munsie authored
This new hcall in POWER8 is used to set various resource mode registers. eg. it can set address translation mode on interrupt (note: partition wide scope) Signed-off-by:
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Michael Neuling authored
This turns on MMU on execptions via AIL field in the LPCR. Signed-off-by:
Matt Evans <matt@ozlabs.org> Signed-off-by:
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Michael Neuling authored
We want to change what's initially set in the LPCR, so start by taking the move from LPCR out of the function and into the caller. Signed-off-by:
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Michael Neuling authored
POWER8/v2.07 allows exceptions to be taken with the MMU still on. A new set of exception vectors is added at 0xc000_0000_0000_4xxx. When the HW takes us here, MSR IR/DR will be set already and we no longer need a costly RFID to turn the MMU back on again. The original 0x0 based exception vectors remain for when the HW can't leave the MMU on. Examples of this are when we can't trust the current MMU mappings, like when we are changing from guest to hypervisor (HV 0 -> 1) or when the MMU was off already. In these cases the HW will take us to the original 0x0 based exception vectors with the MMU off as before. This uses the new macros added previously too implement these new execption vectors at 0xc000_0000_0000_4xxx. We exit these exception vectors using mflr/blr (rather than mtspr SSR0/RFID), since we don't need the costly MMU switch anymore. This moves the __end_interrupts marker down past these new 0x4000 vectors since they will need to be copied down to 0x0 when the kernel is not at 0x0. Signed-off-by:
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Michael Neuling authored
POWER8/v2.07 allows exceptions to be taken with the MMU still on. A new set of exception vectors is added at 0xc000_0000_0000_4xxx. When the HW takes us here, MSR IR/DR will be set already and we no longer need a costly RFID to turn the MMU back on again. The original 0x0 based exception vectors remain for when the HW can't leave the MMU on. Examples of this are when we can't trust the current the MMU mappings, like when we are changing from guest to hypervisor (HV 0 -> 1) or when the MMU was off already. In these cases the HW will take us to the original 0x0 based exception vectors with the MMU off as before. The below macros are copies of the macros used at the 0x0 offset but modified to handle the MMU being on. In these macros we use the link register to jump to the secondary handlers rather than using RFID (RFID was also use to turn on the MMU). Signed-off-by:
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Michael Neuling authored
This turns the syscall handler into macros as we are going to want to reuse them again later. Signed-off-by:
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Michael Neuling authored
If we change load_hander() to use an ori instead of addi, we can load handlers upto 64k away provided we are still 64k aligned. Signed-off-by: -
Michael Neuling authored
This removes the large gap between 0x1800 and 0x3000. Signed-off-by:
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Michael Neuling authored
Remove redundancy spaces and make tab usage consistent. Signed-off-by:
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Benjamin Herrenschmidt authored
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Anton Blanchard authored
If we build a kernel with CONFIG_RELOCATABLE=y CONFIG_CRASH_DUMP=n, the kernel fails when we run at a non zero offset. It turns out we were incorrectly wrapping some of the relocatable kernel code with CONFIG_CRASH_DUMP. Signed-off-by:
Anton Blanchard <anton@samba.org> Cc: <stable@kernel.org> Signed-off-by:
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Michael Neuling authored
A PVR of 0x0F000004 means we are arch v2.07 complicate ie, POWER8. Signed-off-by:
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Michael Neuling authored
Update ibm,architecture.vec for POWER8 and allows us to support more than one parition per core. Signed-off-by:
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JoonSoo Kim authored
commit ea96025a('Don't use alloc_bootmem() in init_IRQ() path') changed alloc_bootmem() to kzalloc(), but missed to change free_bootmem() to kfree(). So correct it. Signed-off-by:
Joonsoo Kim <js1304@gmail.com> Signed-off-by:
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Aravinda Prasad authored
On powerpc, ptrace will disable hardware breakpoint request once the breakpoint is hit. It is the responsibility of the caller to set it again. However, when the caller sets the hardware breakpoint again using ptrace(PTRACE_SET_DEBUGREG, child_pid, 0, addr), the hardware breakpoint is not enabled. While gdb's approach is to unregister and re-register the hardware breakpoint every time the breakpoint is hit - which is working fine, this could affect other programs trying to re-register hardware breakpoint without unregistering. This patch enables hardware breakpoint if the caller is re-registering. Signed-off-by:
Aravinda Prasad <aravinda@linux.vnet.ibm.com> Acked-by:
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Akinobu Mita authored
The only difference between powerpc and asm-generic le-bitops is test_bit_le(). Usually all bitops require a long aligned bitmap. But powerpc test_bit_le() can take an unaligned address. There is no special callsite of test_bit_le() that needs unaligned access in powerpc as far as I can see. So convert to use asm-generic/bitops/le.h for powerpc. Signed-off-by:
Akinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by:
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Akinobu Mita authored
Replace BITOP_MASK and BITOP_WORD with BIT_MASK and BIT_WORD defined in linux/bitops.h and remove BITOP_* which are not used anymore. Signed-off-by:
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Akinobu Mita authored
- Caluculate the bitmap size with BITS_TO_LONGS() - Use bitmap_empty() to verify that all bits are cleared This also includes a printk to pr_warn() conversion. Signed-off-by:
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Sukadev Bhattiprolu authored
Use the 'unistd.h' from arch/powerpc/include/uapi to build the perf tool. Signed-off-by:
Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by:
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Yang Li authored
There are many cases that Semiconductor is misspelled. The patch fix these typos. Signed-off-by:
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Anton Blanchard authored
I noticed a couple of function prototypes for functions that no longer exist. Remove them. Signed-off-by:
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Anton Blanchard authored
Most of setup.h should not be exported to userspace, so move it back. All we are left with is the asm-generic include to pick up the COMMAND_LINE_SIZE define. Signed-off-by:
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Michael Neuling authored
Fix global symbol name to match actual denorm_exception_hv label. Signed-off-by:
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Michael Neuling authored
Signed-off-by:
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