Merge tag 'davinci-fixes-for-v3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes

Pull "DaVinci fixes for v3.15" from Sekhar Nori:

The patch fixes EDMA crossbar mapping to actually
make it work. The patch has been tagged for stable.

* tag 'davinci-fixes-for-v3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: common: edma: Fix xbar mapping
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge 'Allwinner fixes for 3.15' from Maxime Ripard:

Set of fixes for the Allwinner support for 3.15

Some minor things, the major thing being the enabling of the GMAC driver in
sunxi_defconfig that will un-break Olof's autobooters.

* tag 'sunxi-fixes-for-3.15' of https://github.com/mripard/linux:
  ARM: sunxi: Enable GMAC in sunxi_defconfig
  ARM: sun7i: Fix i2c4 base address
  ARM: sun7i: fix PLL4 clock and add PLL8
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge 'ARM: mvebu: DT fixes for v3.15 (incr #2)' from Jason Cooper:

mvebu DT fixes for v3.15 (incremental #2)

 - kirkwood: fix mis-located pcie controller nodes

* tag 'mvebu-dt-fixes-3.15-2' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: fix mislocated pcie-controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>

The Broadcom ARM tree location has changed names to reflect other SoC
families that are queued here. Also add the 216xx family as maintained.
Signed-off-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

The IPU register space is 128MB, not 2GB.

Fixes: abed9a6b 'ARM i.MX53: Add IPU support'
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

From Jason Cooper:
mvebu drivers (mbus and pci) fixes for v3.15

 - pci
    - fix off-by-one for mbus window size
    - split BARs into multiple mbus windows when needed
 - mbus
    - avoid setting undefined window size
    - allow several windows with the same target/attr

* tag 'mvebu-mbus_pci-fixes-3.15' of git://git.infradead.org/linux-mvebu:
  PCI: mvebu: split PCIe BARs into multiple MBus windows when needed
  bus: mvebu-mbus: allow several windows with the same target/attribute
  bus: mvebu-mbus: Avoid setting an undefined window size
  PCI: mvebu: fix off-by-one in the computed size of the mbus windows
Signed-off-by: Olof Johansson <olof@lixom.net>

From Jason Cooper:
mvebu DT fixes for v3.15

 - mvebu
    - fix NOR bus width on Armada XP boards
    - use qsgmii on Armada XP GP board
    - add i2c bus freq for Armada 370 DB board
    - add SATA interface for Armada 375 DB

 - kirkwood
    - fix double probe of audio codec for T5325

* tag 'mvebu-dt-fixes-3.15' of git://git.infradead.org/linux-mvebu:
  ARM: Kirkwood: T5325: Fix double probe of Codec
  ARM: mvebu: enable the SATA interface on Armada 375 DB
  ARM: mvebu: specify I2C bus frequency on Armada 370 DB
  ARM: mvebu: use qsgmii phy-mode for Armada XP GP interfaces
  ARM: mvebu: fix NOR bus-width in Armada XP OpenBlocks AX3 Device Tree
  ARM: mvebu: fix NOR bus-width in Armada XP DB Device Tree
  ARM: mvebu: fix NOR bus-width in Armada XP GP Device Tree
Signed-off-by: Olof Johansson <olof@lixom.net>

From Jason Cooper:
mvebu fixes for v3.15

 - devbus: fix bus-width conversion

 - orion5x: fix target ID for crypto SRAM window

* tag 'mvebu-fixes-3.15' of git://git.infradead.org/linux-mvebu:
  ARM: orion5x: fix target ID for crypto SRAM window
  memory: mvebu-devbus: fix the conversion of the bus width
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge fixes from Tony Lindgren:

Mostly fixes for occasional memory corruption caused by bad
timings for smc911x LAN9220 (and potentially LAN9221) devices
that were noted on a cm-t3730 system. Also fix THUMB mode
for SMP, and mailbox related warnings when booted with device
tree.

* tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: AM3517: Disable absent IPs inherited from OMAP3
  ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox
  ARM: dts: OMAP5: Add mailbox dt node to fix boot warning
  ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU
  ARM: dts: am437x-gp-evm: Do not reset gpio5
  ARM: dts: omap3-igep0020: use SMSC9221 timings
  ARM: dts: Fix GPMC timings for LAN9220
  ARM: dts: Fix GPMC Ethernet timings for omap cm-t sbc-t boards for device tree
  ARM: dts: Fix bad OTG muxing for cm-t boards
Signed-off-by: Olof Johansson <olof@lixom.net>

Commit 54397d85
 ("ARM: kirkwood: Relocate PCIe device tree nodes")

moved the pcie-controller nodes for the Kirkwood SoCs to the mbus
bus node. For some reason, two boards were not properly converted
and have their pci-controller nodes still in the ocp bus node.

As the corresponding SoC pcie-controller does not exist anymore,
it is likely that pcie is broken on those boards since above commit.
Fix it by moving the pcie related nodes to the correct location.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes: 54397d85 ("ARM: kirkwood: Relocate PCIe device tree nodes")
Cc: <stable@vger.kernel.org> # v3.12+
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-2-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>

Since the support of the GMAC has been merged, we're using it as the ethernet
controller on the A20 devices.

However, sunxi_defconfig wasn't selecting it hence breaking the NFS boot.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This is another great example of trainwreck engineering:

commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support)
added support for using EDMA on peripherals which have no direct EDMA
event mapping.

The code compiles and does not explode in your face, but that's it.

1) Reading an u16 array from an u32 device tree array simply does not
   work. Even if the function is named "edma_of_read_u32_to_s16_array".

   It merily calls of_property_read_u16_array. So the resulting 16bit
   array will have every other entry = 0.

2) The DT entry for the xbar registers related to xbar has length 0x10
   instead of the real length: 0xfd0 - 0xf90 = 0x40.

   Not a real problem as it does not cross a page boundary, but
   wrong nevertheless.

3) But none of this matters as the mapping never happens:

   After reading nonsense edma_of_read_u32_to_s16_array() invalidates
   the first array entry pair, so nobody can ever notice the
   braindamage by immediate explosion.

Seems the QA criteria for this code was solely not to explode when
someone adds edma-xbar-event-map entries to the DT. Goal achieved,
congratulations!

Not really helpful if someone wants to use edma on a device which
requires a xbar mapping.

Fix the issues by:

- annotating the device tree entry with "/bits/ 16" as documented in
  the of_property_read_u16_array kernel doc

- make the size of the xbar register mapping correct

- invalidating the end of the array and not the start

This convoluted mess wants to be completely rewritten as there is no
point to keep the xbar_chan array memory and the iomapping of the xbar
regs around forever. Marking the xbar mapped channels as used should
be done right there.

But that's a different issue and this patch is small enough to make it
work and allows a simple backport for stable.

Cc: stable@vger.kernel.org # v3.12+
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

For some reason, the base address of the fifth I2C adapter in the A20 was
incorrect. Change this to the actual base address.
Reported-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>

3.15 fixes for AT91
- one little DT fix
- the use of proper directory for clock in include/dt-bindings
  it allows to remove the now empty include/dt-bindings/clk

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  dt-bindings: clock: Move at91.h to dt-bindigs/clock
  ARM: at91: fix spi cs on sama5d3 Xplained board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The codec is defined both in DT and the board file. The board file
however contains platform data which is required in order that the
codec works. When the DT instantiates the codec before the board files
does, it is missing the platform data and so fails. Remove the DT node
until we have a binding which can pass the additional data.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1397565608-1830-1-git-send-email-andrew@lunn.chSigned-off-by: Jason Cooper <jason@lakedaemon.net>

The Armada 375 SoC has a dual-port SATA interface, which is exposed on
the Armada 375 DB board. This commit therefore enables this interface
on the Armada 375 DB board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-3-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>

In commit 249f3822 ('ARM: mvebu: add
audio support to Armada 370 DB'), the I2C bus 0 was enabled on the
Armada 370 DB board, and an I2C codec was described as being connected
on this bus.

However, this commit forgot to define the I2C bus frequency, which
leads the i2c-mv64xxx to fail probing, as it cannot calculate the baud
rate multiplier/divisor to derive the I2C bus frequency from the core
SoC frequency. It makes audio completely unusable, as the I2C bus is
not probed, and therefore the audio codec is not probed either.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-2-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>

The Armada XP GP isn't using rgmii-id connections between the MAC and
PHY, but instead a single QSGMII connection, which is a quad-SGMII
connection: a double pair of differential lines that are multiplexed
to convey the traffic of four network interfaces between a MAC and a
PHY.

Until now, the Armada XP GP was relying on the bootloader setting the
correct values in various configuration registers. With this change,
the mvneta driver can be used as a module on this platform.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397569821-5530-4-git-send-email-thomas.petazzoni@free-electrons.comTested-by: Arnaud Ebalard <arno@natisbad.org>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.

This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP OpenBlocks AX3 Device Tree: a 8 bits bus width was
declared, even though the hardware actually has a 16 bits bus width
connection with the NOR flash.

Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.

This bug was introduced in commit
a7d4f818 ('ARM: mvebu: Add support for
NOR flash device on Openblocks AX3 board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-5-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: a7d4f818 ('ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board')
Cc: stable@vger.kernel.org # v3.10+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.

This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP DB Device Tree: a 8 bits bus width was declared, even
though the hardware actually has a 16 bits bus width connection with
the NOR flash.

Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.

This bug was introduced in commit
b484ff42 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-DB board') which was merged in v3.11.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-4-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: b484ff42 ('ARM: mvebu: Add support for NOR flash device on Armada XP-DB board')
Cc: stable@vger.kernel.org # v3.11+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The mvebu-devbus driver had a serious bug, which lead to a 8 bits bus
width declared in the Device Tree being considered as a 16 bits bus
width when configuring the hardware.

This bug in mvebu-devbus driver was compensated by a symetric mistake
in the Armada XP GP Device Tree: a 8 bits bus width was declared, even
though the hardware actually has a 16 bits bus width connection with
the NOR flash.

Now that we have fixed the mvebu-devbus driver to behave according to
its Device Tree binding, this commit fixes the problematic Device Tree
files as well.

This bug was introduced in commit
da8d1b38 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-GP board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397489361-5833-3-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: da8d1b38 ('ARM: mvebu: Add support for NOR flash device on Armada XP-GP board')
Cc: stable@vger.kernel.org # v3.10+
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

AM3517 inherits OMAP3 dts file, but does not have all the IPs
that are present on OMAP3. This patch disables the following
absent IPs for AM3517: Mailbox, IVA, MMU_ISP, MPU_IVA SmartReflex.

A label had to be added for IVA node in omap3.dtsi to be able to
get a reference to the node for disabling.

Otherwise we get the following warnings during booting:
platform iva.2: Cannot lookup hwmod 'iva'
platform 48094000.mailbox: Cannot lookup hwmod 'mailbox'
platform 480bd400.mmu: Cannot lookup hwmod 'mmu_isp'
platform 480c9000.smartreflex: Cannot lookup hwmod 'smartreflex_mpu_iva'
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description for the warnings]
Signed-off-by: Tony Lindgren <tony@atomide.com>

The mailbox module is capable of generating two interrupts
to MPU in OMAP2420, compared to one in OMAP2430. The second
interrupt is to handle interrupts from the additional IVA
processor present only on OMAP2420.

Move the current common mailbox DT node into the SoC
specific files to allow the above differentiation. Also,
added back the interrupt-names on OMAP2420, that were
previously defined in hwmod data.

This fixes regression caused by the recent dropping of
hwmod data in favor for defining it in the .dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add the mailbox device DT node for OMAP5 SoC. The OMAP5 mailbox
IP is identical to that used in OMAP4.

The OMAP5 hwmod data no longer publishes the module address space,
so this patch fixes the WARN_ON backtrace associated with the
following trace during the kernel boot:
"omap_hwmod: mailbox: doesn't have mpu register target base".

Otherwise we get a warning like this:

WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2538 _init+0x1c0/0x3dc()
omap_hwmod: mailbox: doesn't have mpu register target base
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.15.0-rc2-00001-gb5e85a0 #45
[<c0015724>] (unwind_backtrace) from [<c00120f4>] (show_stack+0x10/0x14)
[<c00120f4>] (show_stack) from [<c05a1ccc>] (dump_stack+0x78/0x94)
[<c05a1ccc>] (dump_stack) from [<c0042a74>] (warn_slowpath_common+0x6c/0x8c)
[<c0042a74>] (warn_slowpath_common) from [<c0042b28>] (warn_slowpath_fmt+0x30/0x40)
[<c0042b28>] (warn_slowpath_fmt) from [<c0803b40>] (_init+0x1c0/0x3dc)
[<c0803b40>] (_init) from [<c0029c8c>] (omap_hwmod_for_each+0x34/0x5c)
[<c0029c8c>] (omap_hwmod_for_each) from [<c08042b0>] (__omap_hwmod_setup_all+0x24/0x40)
[<c08042b0>] (__omap_hwmod_setup_all) from [<c00088b8>] (do_one_initcall+0x34/0x160)
[<c00088b8>] (do_one_initcall) from [<c07f7bf4>] (kernel_init_freeable+0xfc/0x1c8)
[<c07f7bf4>] (kernel_init_freeable) from [<c059c4f4>] (kernel_init+0x8/0xe4)
[<c059c4f4>] (kernel_init) from [<c000eaa8>] (ret_from_fork+0x14/0x2c)
Signed-off-by: Suman Anna <s-anna@ti.com>
[tony@atomide.com: updated description to for the warning]
Signed-off-by: Tony Lindgren <tony@atomide.com>

On my DRA7 system, when the kernel is built in Thumb-2 mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU is in ARM mode once the ROM hands over control to
the kernel.  Switch to Thumb-2 mode if required once the kernel is control of
secondary CPU. On OMAP4 on the other hand, it appears to be in Thumb-2 mode on
entry so this is not required and SMP boot works as is.

Also corrected a spurious '+' and updated copyright information.

Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Do not reset GPIO5 at boot-up because GPIO5_7 is used
on AM437x GP-EVM to control VTT regulators on DDR3.
Without this some GP-EVM boards will fail to boot because
of DDR3 corruption.
Reported-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The IGEPv2 board has a SMSC LAN9221i ethernet chip and not a
SMSC LAN911x connected to the GPMC. Each chip needs different
timings in order to operate correctly so is wrong to include
omap-gpmc-smsc911x.dtsi instead of omap-gpmc-smsc9221.dtsi.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[tony@atomide.com: this is needed to avoid potential memory corruption]
Signed-off-by: Tony Lindgren <tony@atomide.com>

arm: Xilinx Zynq DT fixes for v3.15

- Enable Zynq I2c
- Fix cpufreq DT binding

* tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx:
  ARM: zynq: dt: Add I2C nodes to Zynq device tree
  ARM: zynq: DT: Add 'clock-latency' property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

ARM Versatile Express fixes for 3.15

This series contains straight-forward fixes for different
Versatile Express infrastructure drivers:

- NULL pointer dereference on the error path in the clk driver
- out of boundary array access in the dcscb driver
- broken restart/power off implementation
- mis-interpreted voltage unit in the spc driver

* tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll/linux:
  ARM: vexpress/TC2: Convert OPP voltage to uV before storing
  power/reset: vexpress: Fix restart/power off operation
  arm/mach-vexpress: array accessed out of bounds
  clk: vexpress: NULL dereference on error path

Includes an update to 3.15-rc2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The SPC stores voltage in mV while the code assumes it was returning
uV. Convert the returned voltage to uV before storing. Also fix the
comment depicting voltage to uV.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>

The restart/power off implementation in the vexpress driver
used to obtain the config function when necessary. This was
wrong in two respects:

1. It required memory allocation with disabled interrupts
(it worked, but lockdep - when enabled - reported warnings).

2. Used jiffies-based timeout, while jiffies are not running
at this stage of system shutdown (therefore a config
transaction error - if happened - would have never be reported).

Fixed by pre-allocating the config function per device
and using mdelay for timeout.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>

The Tegra124 clock DT binding currently provides 3 clocks that don't
actually exist; 2 for NAND and one for UART5/UARTE. Delete these. While
this is technically an incompatible DT ABI change, nothing could have
used these clock IDs for anything practical, since the HW doesn't exist.

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The Tegra124 clock driver currently provides 3 clocks that don't actually
exist; 2 for NAND and one for UART5/UARTE. Delete these.

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth
UART, but this appears to be left-over from earlier SoC documentation.
Remove the non-existent DT node for UART5.

Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'omap-for-v3.15/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omaps, mostly to fix some GPMC, DSS and USB issues for
device tree based booting. And turns out BeagleBoard xM A/B
needs it's own minimal dts in addition to the related u-boot
changes. Also few minor documentation and typo fixes are merged
to get them out of the way.

* tag 'omap-for-v3.15/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix GPMC remap for devices using an offset
  ARM: OMAP2+: Fix oops for GPMC free
  ARM: dts: Add support for the BeagleBoard xM A/B
  ARM: dts: Grammar /that will/it will/
  ARM: dts: Grammar /is uses/ is used/
  ARM: OMAP2+: Fix config name for USB3 PHY
  ARM: dts: am335x: update USB DT references
  ARM: dts: OMAP2+: remove uses of obsolete gpmc,device-nand
  ARM: AM335X: EVM: fix pinmux documentation in devicetree
  ARM: OMAP2+: N900: remove omapdss init for DT boot
  ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift
  ARM: dts: omap5: Add clocks to USB3 PHY node
  ARM: OMAP2+: hwmod: fix missing braces in _init()
  ARM: AM43xx: fix dpll init in bypass mode
  ARM: OMAP3: hwmod data: Correct clock domains for USB modules
  ARM: OMAP3: PM: remove access to PRM_VOLTCTRL register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'ux500-defconfig-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes

This is a patch set for some ST-Ericsson devices:
- Updates the Ux500 (U8500) defconfig
- Selects PARTITION_ADVANCED for Ux500 and U300
- Configure in IIO sensor drivers for the Ux500
- Configure in the CW1200 WLAN chip for the Ux500

* tag 'ux500-defconfig-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: configure for CW1200 WLAN chip
  ARM: ux500: configure in sensors
  ARM: u300: u300_defconfig: Enable PARTITION_ADVANCED
  ARM: ux500: u8500_defconfig: Enable PARTITION_ADVANCED
  ARM: ux500: update defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-fixes-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Renesas ARM Based SoC Fixes Updates for v3.15

r8a7791 (R-Car M2) based koelsch board
* Correct renesas,gpios to renesas,groups in sd[012] pfc

8a7790 (R-Car H2) based lager board
* Correct SND_SOC_DAIFMT_CBx_CFx flags

r8a7740 (R-Mobile A1) SoC
* Drop address cells from GIC node

r8a7740 (R-Mobile A1) based Armadillo800 EVA board
* Correct SND_SOC_DAIFMT_CBx_CFx flags

sh73a0 (SH-Mobile AG5) SoC
* Drop address cells from GIC node

* tag 'renesas-fixes-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: koelsch: correct renesas,gpios to renesas,groups in sd[012] pfc
  ARM: shmobile: r8a7740: drop address cells from GIC node
  ARM: shmobile: sh73a0: drop address cells from GIC node
  ARM: shmobile: armadillo800eva: fixup SND_SOC_DAIFMT_CBx_CFx flags
  ARM: shmobile: lager: fixup SND_SOC_DAIFMT_CBx_CFx flags
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-dt5-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Fifth Round of Renesas ARM Based SoC DT Updates for v3.15

Correct renesas,groups in SDHI nodes of for r8a7790 (R-Car H2) based
Lager board.

* tag 'renesas-dt5-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: lager: correct renesas,gpios to renesas,groups in sd[02] pfc
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'v3.15-rockchip-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes

Fixing uart-rx pull settings and a copy'n'paste error in a smp message

* tag 'v3.15-rockchip-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: fix copy'n'paste error in smp error messages
  ARM: rockchip: rk3188: enable pull-ups on UART RX pins
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'imx-fixes-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

The i.MX fixes for 3.15:
 - A couple of dts changes for the fallout of imx-drm binding update
 - Parent DI clocks to video PLL for better HDMI support
 - PCIe interrupt mapping and GIC node fixes
 - A series of edmqmx6 board fixes
 - Other small and random fixes on imx5 and imx6 dts

* tag 'imx-fixes-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: i.MX6: ipu_di_sel clocks can set parent rates
  ARM: imx6q: clk: Parent DI clocks to video PLL via di_pre_sel
  ARM: dts: imx: add required #clock-cells for fixed-clock
  ARM: dts: vybrid: drop address and size cells from GIC node
  ARM: dts: imx6sl-evk: Add an entry for MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11
  ARM: dts: imx53: fix apparent copy/paste error
  ARM: dts: imx6q-gw5xxx: remove dead 'crtcs' property
  ARM: dts: imx53-tx53: add IPU DI ports and endpoints
  ARM: dts: imx6: edmqmx6: add second STMPE
  ARM: dts: imx6: edmqmx6: USB H1 only supports host mode
  ARM: dts: imx6: edmqmx6: Do not use the OTG switch as VBUS regulator
  ARM: dts: imx6: edmqmx6: Fix usbotg id pin
  ARM: dt: microsom: don't set bit 7 for ethernet mux settings
  ARM: imx6q-clk: parent lvds_gate from lvds_sel
  ARM: dts: imx: drop invalid size and address cells properties
  ARM: dts: mx5: fix wrong stmpe-ts bindings
  ARM: dts: imx53-m53evk: Fix memory region description
  ARM: dts: imx53-qsb-common: Fix memory region description
  ARM: dts: imx6: add PCIe interrupt mapping properties
Signed-off-by: Arnd Bergmann <arnd@arndb.de>