1. 10 Nov, 2018 21 commits
    • David S. Miller's avatar
      Merge branch 'ptp-more-accurate-PHC-system-clock-synchronization' · 3f2bba7d
      David S. Miller authored
      Miroslav Lichvar says:
      
      ====================
      More accurate PHC<->system clock synchronization
      
      RFC->v1:
      - added new patches
      - separated PHC timestamp from ptp_system_timestamp
      - fixed memory leak in PTP_SYS_OFFSET_EXTENDED
      - changed PTP_SYS_OFFSET_EXTENDED to work with array of arrays
      - fixed PTP_SYS_OFFSET_EXTENDED to break correctly from loop
      - fixed timecounter updates in drivers
      - split gettimex in igb driver
      - fixed ptp_read_* functions to be available without
        CONFIG_PTP_1588_CLOCK
      
      This series enables a more accurate synchronization between PTP hardware
      clocks and the system clock.
      
      The first two patches are minor cleanup/bug fixes.
      
      The third patch adds an extended version of the PTP_SYS_OFFSET ioctl,
      which returns three timestamps for each measurement. The idea is to
      shorten the interval between the system timestamps to contain just the
      reading of the lowest register of the PHC in order to reduce the error
      in the measured offset and get a smaller upper bound on the maximum
      error.
      
      The fourth patch deprecates the original gettime function.
      
      The remaining patches update the gettime function in order to support
      the new ioctl in the e1000e, igb, ixgbe, and tg3 drivers.
      
      Tests with few different NICs in different machines show that:
      - with an I219 (e1000e) the measured delay was reduced from 2500 to 1300
        ns and the error in the measured offset, when compared to the cross
        timestamping supported by the driver, was reduced by a factor of 5
      - with an I210 (igb) the delay was reduced from 5100 to 1700 ns
      - with an I350 (igb) the delay was reduced from 2300 to 750 ns
      - with an X550 (ixgbe) the delay was reduced from 1950 to 650 ns
      - with a BCM5720 (tg3) the delay was reduced from 2400 to 1200 ns
      ====================
      Acked-by: default avatarRichard Cochran <richardcochran@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3f2bba7d
    • Miroslav Lichvar's avatar
      tg3: extend PTP gettime function to read system clock · 6fe42e22
      Miroslav Lichvar authored
      This adds support for the PTP_SYS_OFFSET_EXTENDED ioctl.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Michael Chan <michael.chan@broadcom.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6fe42e22
    • Miroslav Lichvar's avatar
      ixgbe: extend PTP gettime function to read system clock · 018ed23d
      Miroslav Lichvar authored
      This adds support for the PTP_SYS_OFFSET_EXTENDED ioctl.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Acked-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      018ed23d
    • Miroslav Lichvar's avatar
      igb: extend PTP gettime function to read system clock · cff8ba28
      Miroslav Lichvar authored
      This adds support for the PTP_SYS_OFFSET_EXTENDED ioctl.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Acked-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      cff8ba28
    • Miroslav Lichvar's avatar
      e1000e: extend PTP gettime function to read system clock · 98942d70
      Miroslav Lichvar authored
      This adds support for the PTP_SYS_OFFSET_EXTENDED ioctl.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Acked-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      98942d70
    • Miroslav Lichvar's avatar
      ptp: deprecate gettime64() in favor of gettimex64() · 916444df
      Miroslav Lichvar authored
      When a driver provides gettimex64(), use it in the PTP_SYS_OFFSET ioctl
      and POSIX clock's gettime() instead of gettime64(). Drivers should
      provide only one of the functions.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      916444df
    • Miroslav Lichvar's avatar
      ptp: add PTP_SYS_OFFSET_EXTENDED ioctl · 36180087
      Miroslav Lichvar authored
      The PTP_SYS_OFFSET ioctl, which can be used to measure the offset
      between a PHC and the system clock, includes the total time that the
      driver needs to read the PHC timestamp.
      
      This typically involves reading of multiple PCI registers (sometimes in
      multiple iterations) and the register that contains the lowest bits of
      the timestamp is not read in the middle between the two readings of the
      system clock. This asymmetry causes the measured offset to have a
      significant error.
      
      Introduce a new ioctl, driver function, and helper functions, which
      allow the reading of the lowest register to be isolated from the other
      readings in order to reduce the asymmetry. The ioctl returns three
      timestamps for each measurement:
      - system time right before reading the lowest bits of the PHC timestamp
      - PHC time
      - system time immediately after reading the lowest bits of the PHC
        timestamp
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Cc: Marcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      36180087
    • Miroslav Lichvar's avatar
      ptp: check gettime64 return code in PTP_SYS_OFFSET ioctl · 83d0bdc7
      Miroslav Lichvar authored
      If a gettime64 call fails, return the error and avoid copying data back
      to user.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Cc: Jacob Keller <jacob.e.keller@intel.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      83d0bdc7
    • Miroslav Lichvar's avatar
      ptp: reorder declarations in ptp_ioctl() · fbb960ac
      Miroslav Lichvar authored
      Reorder declarations of variables as reversed Christmas tree.
      
      Cc: Richard Cochran <richardcochran@gmail.com>
      Suggested-by: default avatarRichard Cochran <richardcochran@gmail.com>
      Signed-off-by: default avatarMiroslav Lichvar <mlichvar@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fbb960ac
    • David S. Miller's avatar
      Merge branch 'hns3-add-code-optimization-for-VF-reset-and-some-new-reset-feature' · 70e79832
      David S. Miller authored
      Huazhong Tan says:
      
      ====================
      hns3: add code optimization for VF reset and some new reset feature
      
      Currently hardware supports below reset:
      1. VF reset: triggered by sending cmd to IMP(Integrated Management
         Processor). Only reset specific VF function and do not affect
         other PF or VF.
      2. PF reset: triggered by sending cmd to IMP. Only reset specific PF
         and it's VF.
      3. PF FLR: triggered by PCIe subsystem. Only reset specific PF and
         it's VF.
      4. VF FLR: triggered by PCIe subsystem. Only reset specific VF function
         and do not affect other PF or VF.
      5. Core reset: triggered by writing to register. Reset most hardware
         unit, such as SSU, which affects all the PF and VF.
      6. Global reset: triggered by writing to register. Reset all hardware
         unit, which affects all the PF and VF.
      7. IMP reset: triggered by IMU(Intelligent Management Unit) when
         IMP is not longer feeding IMU's watchdog. IMU will reload the IMP
         firmware and IMP will perform global reset after firmware reloading,
         which affects all the PF and VF.
      
      Current driver only support PF/VF reset, incomplete core and global
      reset(lacking the vf reset handling). So this patchset adds complete
      reset support in hns3 driver.
      
      Also, this patchset contains some optimization related to reset.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      70e79832
    • Huazhong Tan's avatar
      net: hns3: add PCIe FLR support for VF · 6ff3cf07
      Huazhong Tan authored
      This patch implements the .reset_prepare and .reset_done
      ops from pci framework to support the VF FLR.
      
      This patch uses hclgevf_set_def_reset_request() and
      hclgevf_reset_event() to handle FLR, so when
      hdev->default_reset_request is non zero, it means there is
      some reset requseted by hclgevf_set_def_reset_request() need
      to be processed. Also get the hdev from the ae_dev because
      hclgevf_reset_event is called with handle being NULL.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6ff3cf07
    • Huazhong Tan's avatar
      net: hns3: do VF's pci re-initialization while PF doing FLR · 862d969a
      Huazhong Tan authored
      While doing PF FLR, VF's PCIe configuration space will be cleared, so
      the pci and vector of VF should be re-initialized in the VF's reset
      process while PF doing FLR.
      
      Also, this patch fixes some memory not freed problem when pci
      re-initialization is done during reset process.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      862d969a
    • Huazhong Tan's avatar
      net: hns3: add PCIe FLR support for PF · 6b9a97ee
      Huazhong Tan authored
      This patch implements the .reset_prepare and .reset_done
      ops from pci framework to support the PF FLR.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6b9a97ee
    • Huazhong Tan's avatar
      net: hns3: implement the IMP reset processing for PF · 6dd22bbc
      Huazhong Tan authored
      The current code only print the prompt message after receiving
      the IMP reset interrupt and does not perform the corresponding driver
      reset operation. This patch implements the missing IMP reset handling
      in the driver.
      1. The driver sets the HCLGE_STATE_CMD_DISABLE to stop sending command
         after receiving the IMP reset interrupt.
      2. The driver needs to notify the hardware to reload the IMP firmware.
      3. The IMP firmware reloading makes the reset time of hardware longer,
         so it is necessary to extend the driver's waiting time to wait for
         the hardware reset to complete.
      4. In hclge_check_event_cause, IMP reset event should have higher
         priority than other events.
      
      Also, after clearing HCLGE_STATE_CMD_DISABLE in the hclge_cmd_init(),
      it needs to check whether there is a pending reset, if so, just set
      the HCLGE_STATE_CMD_DISABLE back and return.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6dd22bbc
    • Huazhong Tan's avatar
      net: hns3: stop napi polling when HNS3_NIC_STATE_DOWN is set · ff0699e0
      Huazhong Tan authored
      When calling napi_disable during reset down process, if NAPIF_STATE_MISSED
      is set, napi_complete will call __napi_schedule to do the polling again.
      So this patch uses HNS3_NIC_STATE_DOWN to ensure the polling is not
      scheduled again.
      
      Also, when napi_complete returns true, it means polling is scheduled
      again, it is not neccssary to enable the interrupt.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ff0699e0
    • Huazhong Tan's avatar
      net: hns3: add error handler for hclgevf_reset() · 6a5f6fa3
      Huazhong Tan authored
      Since hclgevf_reset() may fail for some reasons, so it needs an error
      handler to deal with it. When VF reset failed, VF can only be restored
      by a higher level reset asserted by PF. So, it needs to reinitialize
      its command queue, then it can respond to higher level reset.
      
      Also, this patch adds error logging in the hclgevf_notify_client().
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6a5f6fa3
    • Huazhong Tan's avatar
      net: hns3: stop handling command queue while resetting VF · ef5f8e50
      Huazhong Tan authored
      According to hardware's description, after the reset occurs, the driver
      needs to re-initialize the command queue before sending and receiving
      any commands. Therefore, the VF's driver needs to identify the command
      queue needs to re-initialize with HCLGEVF_STATE_CMD_DISABLE, and does
      not allow sending or receiving commands before the re-initialization.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ef5f8e50
    • Huazhong Tan's avatar
      net: hns3: add reset handling for VF when doing Core/Global/IMP reset · b90fcc5b
      Huazhong Tan authored
      When a Core/Global/IMP reset occurs, the hardware sets the reset status
      register of all PF/VF and reports a reset interrupt to all PF/VF and
      firmware.
      
      When receiving the reset interrupt:
      1. The firmware will wait for 100 ms before resetting the hardware and
         clear the reset status register of all PF when hardware reset is done.
      2. The PF/VF driver needs to down the netdev within 100 ms and then wait
         for hardware reset to finish.
      3. After firmware clearing the reset status register of all PF, the PF
         driver reinitializes the hardware and clear the reset status register
         of it's VF.
      4. After PF driver clearing the reset status register of VF, the VF driver
         reinitializes the hardware.
      
      This patch mainly add handling for the step 4.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b90fcc5b
    • Huazhong Tan's avatar
      net: hns3: add reset handling for VF when doing PF reset · aa5c4f17
      Huazhong Tan authored
      When PF performs a function reset, the hardware will reset both PF
      and all the VF belong to this PF. Hence, both PF's driver and VF's
      driver need to perform corresponding reset operations.
      
      Before PF driver asserting function reset to hardware, it firstly
      set up VF's hardware reset status, and inform the VF driver with
      HNAE3_VF_PF_FUNC_RESET, then VF driver sets this reset type to
      reset_pending and shechule reset task to stop IO and waits for the
      hardware reset status to clear. When PF driver has reinitialized the
      hardware and is ready to process mailbox from VF, PF driver clears
      VF's hardware reset status for VF to continue its reset process.
      
      Also, this patch uses readl_poll_timeout to simplify the hardware reset
      status waitting.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      aa5c4f17
    • Huazhong Tan's avatar
      net: hns3: adjust VF's reset process · dea846e8
      Huazhong Tan authored
      Currently when VF need to reset itself, it will send a cmd to PF,
      after receiving the VF reset requset, PF sends a cmd to inform
      VF to enter the reset process and send a cmd to firmware to do the
      actual reset for the VF, it is possible that firmware has resetted
      the VF, but VF has not entered the reset process, which may cause
      IO not stopped problem when firmware is resetting VF.
      
      This patch fixes it by adjusting the VF reset process, when VF
      need to reset itself, it will enter the reset process first, and
      it will tell the PF to send cmd to firmware to reset itself.
      
      Add member reset_pending to struct hclgevf_dev, which indicates that
      there is reset event need to be processed by the VF's reset task, and
      the VF's reset task chooses the highest-level one and clears other
      low-level one when it processes reset_pending.
      
      hclge_inform_reset_assert_to_vf function is unused now, but it will
      be used to support the PF reset with VF working, so declare it in
      the header file.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      dea846e8
    • Huazhong Tan's avatar
      net: hns3: add reset_hdev to reinit the hdev in VF's reset process · 9c6f7085
      Huazhong Tan authored
      When doing reset, the reset handling function only need to
      reinitialize hardware, it makes sense to add a function to
      do that job. Also the error handling of hclgevf_init_hdev is
      different when it is used in reset process.
      
      This patch adds reset_hdev to reinitialize hardware when resetting.
      Also, this patch removes the hclgevf_dev_ongoing_full_reset because
      it is unused now.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9c6f7085
  2. 09 Nov, 2018 19 commits