- 06 Nov, 2019 3 commits
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Neil Armstrong authored
This fixes the following DT schemas check errors: meson-g12b-odroid-n2.dt.yaml: /: compatible: ['hardkernel,odroid-n2', 'amlogic,g12b'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
This fixes the following DT schemas check errors: meson-gxm-khadas-vim2.dt.yaml: gpu@c0000: interrupt-names:0: 'job' was expected meson-gxm-khadas-vim2.dt.yaml: gpu@c0000: interrupt-names:2: 'gpu' was expected Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
This fixes the following DT schemas check errors: meson-g12b-s922x-khadas-vim3.dt.yaml: gpu@ffe40000: interrupt-names:0: 'job' was expected meson-g12b-s922x-khadas-vim3.dt.yaml: gpu@ffe40000: interrupt-names:2: 'gpu' was expected Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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- 26 Oct, 2019 1 commit
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Corentin Labbe authored
This patch adds the GXL crypto hardware node for all GXL SoCs. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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- 17 Oct, 2019 8 commits
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Christian Hewitt authored
Add the rc-vega-s9x keymap to the existing IR node in the device tree. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Add an IR node to the Vega S96 dts to include the rc-vega-s9x keymap. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Guillaume La Roque authored
Add missing #colling-cells field for G12B SoC Add cooling-map for passive and hot trip point Tested-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Guillaume La Roque authored
Add missing #colling-cells field for G12A SoC Add cooling-map for passive and hot trip point Tested-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Guillaume La Roque authored
Add minimal thermal zone for two temperature sensor One is located close to the DDR and the other one is located close to the PLLs (between the CPU and GPU) Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Guillaume La Roque authored
Add cpu and ddr temperature sensors for G12 Socs Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Add and enable the audio devices on the sei610. The new FRDDR/TODDR D of the SM1 have been left out on purpose. The plaftorm has 2 possible playback interfaces and 3 possible capture interfaces. 3 pcm interfaces for each direction is enough. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Add the audio devices found on the SM1 SoC family. Only the spdif output and input are missing. These are not supported yet since no platform is available to them. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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- 16 Oct, 2019 2 commits
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git://github.com/BayLibre/clk-mesonKevin Hilman authored
First round of amlogic DT binding clock update target for v5.5 Add the audio clock and reset bindings for the sm1 SoC family * tag 'clk-meson-dt-v5.5-1' of git://github.com/BayLibre/clk-meson: dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings
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Kevin Hilman authored
Merge branch 'reset/meson-sm1-bindings' of git://git.pengutronix.de/git/pza/linux into v5.5/dt64-redo * 'reset/meson-sm1-bindings' of git://git.pengutronix.de/git/pza/linux: reset: dt-bindings: meson: update arb bindings for sm1
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- 08 Oct, 2019 2 commits
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Jerome Brunet authored
Add the reset id of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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Jerome Brunet authored
Add the compatible and clock ids of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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- 07 Oct, 2019 21 commits
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Neil Armstrong authored
SimpleFB allows transferring a framebuffer from the firmware/bootloader to the kernel, while making sure the related clocks and power supplies stay enabled. Add nodes for CVBS and HDMI Simple Framebuffers, based on the GXBB/GXL/GXM support at [1]. [1] 03b37035 ("arm64: dts: meson-gx: add support for simplef") Cc: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Provide the reset lines coming from the audio clock controller to the audio devices of the g12 family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
As per schematics HDMI_P5V0 is supplied by P5V0 so add missing link. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
As per schematics TFLASH_VDD, TF_IO, VCC3V3 fixed regulator output which is supplied by VDDIO_AO3V3. While here, move the comment name with the signal name in the schematics above the gpio property to make it consistent with other regulators. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
As per schematics VDDIO_AO18, VDDIO_AO3V3/VDD3V3 DDR3_1V5/DDR_VDDC: fixed regulator output which is supplied by P5V0. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Shorten the model description to improve readability in some app GUIs that show the string. Update compatible to be more descriptive, using the format of the LaFrite board in meson-gxl-s805x-libretech-ac.dts. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Update the compatible for the Libre Computer aml-s905x-cc to be more descriptive using the format introduced with the aml-s805x-ac board. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Shorten the model description to improve readability in some app GUIs that show the string. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Fixes: 33344e21 ("arm64: dts: meson-gxm-khadas-vim2: fix Bluetooth support") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Fixes: dd5297cc ("arm64: dts: meson-gxl-s905x-khadas-vim enable Bluetooth") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Fix DTC warnings: arch/arm/dts/meson-gxl-s905x-khadas-vim.dtb: Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Fixes: e15d2774 ("ARM64: dts: meson-gxl: add support for the Khadas VIM board") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
usb_otg bus needs to get initialize from the u-boot to be configured to used as power source to SBC or usb otg port will get configured as host device. Right now this support is missing in the u-boot and phy driver so to avoid power failed warning, we would disable this feature until proper fix is found. [ 2.716048] phy phy-c0000000.phy.0: USB ID detect failed! [ 2.720186] phy phy-c0000000.phy.0: phy poweron failed --> -22 [ 2.726001] ------------[ cut here ]------------ [ 2.730583] WARNING: CPU: 0 PID: 12 at drivers/regulator/core.c:2039 _regulator_put+0x3c/0xe8 [ 2.738983] Modules linked in: [ 2.742005] CPU: 0 PID: 12 Comm: kworker/0:1 Not tainted 5.2.9-1-ARCH #1 [ 2.748643] Hardware name: Hardkernel ODROID-C2 (DT) [ 2.753566] Workqueue: events deferred_probe_work_func [ 2.758649] pstate: 60000005 (nZCv daif -PAN -UAO) [ 2.763394] pc : _regulator_put+0x3c/0xe8 [ 2.767361] lr : _regulator_put+0x3c/0xe8 [ 2.771326] sp : ffff000011aa3a50 [ 2.774604] x29: ffff000011aa3a50 x28: ffff80007ed1b600 [ 2.779865] x27: ffff80007f7036a8 x26: ffff80007f7036a8 [ 2.785126] x25: 0000000000000000 x24: ffff000011a44458 [ 2.790387] x23: ffff000011344218 x22: 0000000000000009 [ 2.795649] x21: ffff000011aa3b68 x20: ffff80007ed1b500 [ 2.800910] x19: ffff80007ed1b500 x18: 0000000000000010 [ 2.806171] x17: 000000005be5943c x16: 00000000f1c73b29 [ 2.811432] x15: ffffffffffffffff x14: ffff0000117396c8 [ 2.816694] x13: ffff000091aa37a7 x12: ffff000011aa37af [ 2.821955] x11: ffff000011763000 x10: ffff000011aa3730 [ 2.827216] x9 : 00000000ffffffd0 x8 : ffff000010871760 [ 2.832477] x7 : 00000000000000d0 x6 : ffff0000119d151b [ 2.837739] x5 : 000000000000000f x4 : 0000000000000000 [ 2.843000] x3 : 0000000000000000 x2 : 38104b2678c20100 [ 2.848261] x1 : 0000000000000000 x0 : 0000000000000024 [ 2.853523] Call trace: [ 2.855940] _regulator_put+0x3c/0xe8 [ 2.859562] regulator_put+0x34/0x48 [ 2.863098] regulator_bulk_free+0x40/0x58 [ 2.867153] devm_regulator_bulk_release+0x24/0x30 [ 2.871896] release_nodes+0x1f0/0x2e0 [ 2.875604] devres_release_all+0x64/0xa4 [ 2.879571] really_probe+0x1c8/0x3e0 [ 2.883194] driver_probe_device+0xe4/0x138 [ 2.887334] __device_attach_driver+0x90/0x110 [ 2.891733] bus_for_each_drv+0x8c/0xd8 [ 2.895527] __device_attach+0xdc/0x160 [ 2.899322] device_initial_probe+0x24/0x30 [ 2.903463] bus_probe_device+0x9c/0xa8 [ 2.907258] deferred_probe_work_func+0xa0/0xf0 [ 2.911745] process_one_work+0x1b4/0x408 [ 2.915711] worker_thread+0x54/0x4b8 [ 2.919334] kthread+0x12c/0x130 [ 2.922526] ret_from_fork+0x10/0x1c [ 2.926060] ---[ end trace 51a68f4c0035d6c0 ]--- [ 2.930691] ------------[ cut here ]------------ [ 2.935242] WARNING: CPU: 0 PID: 12 at drivers/regulator/core.c:2039 _regulator_put+0x3c/0xe8 [ 2.943653] Modules linked in: [ 2.946675] CPU: 0 PID: 12 Comm: kworker/0:1 Tainted: G W 5.2.9-1-ARCH #1 [ 2.954694] Hardware name: Hardkernel ODROID-C2 (DT) [ 2.959613] Workqueue: events deferred_probe_work_func [ 2.964700] pstate: 60000005 (nZCv daif -PAN -UAO) [ 2.969445] pc : _regulator_put+0x3c/0xe8 [ 2.973412] lr : _regulator_put+0x3c/0xe8 [ 2.977377] sp : ffff000011aa3a50 [ 2.980655] x29: ffff000011aa3a50 x28: ffff80007ed1b600 [ 2.985916] x27: ffff80007f7036a8 x26: ffff80007f7036a8 [ 2.991177] x25: 0000000000000000 x24: ffff000011a44458 [ 2.996439] x23: ffff000011344218 x22: 0000000000000009 [ 3.001700] x21: ffff000011aa3b68 x20: ffff80007ed1bd00 [ 3.006961] x19: ffff80007ed1bd00 x18: 0000000000000010 [ 3.012222] x17: 000000005be5943c x16: 00000000f1c73b29 [ 3.017484] x15: ffffffffffffffff x14: ffff0000117396c8 [ 3.022745] x13: ffff000091aa37a7 x12: ffff000011aa37af [ 3.028006] x11: ffff000011763000 x10: ffff000011aa3730 [ 3.033267] x9 : 00000000ffffffd0 x8 : ffff000010871760 [ 3.038528] x7 : 00000000000000fd x6 : ffff0000119d151b [ 3.043790] x5 : 000000000000000f x4 : 0000000000000000 [ 3.049051] x3 : 0000000000000000 x2 : 38104b2678c20100 [ 3.054312] x1 : 0000000000000000 x0 : 0000000000000024 [ 3.059574] Call trace: [ 3.061991] _regulator_put+0x3c/0xe8 [ 3.065613] regulator_put+0x34/0x48 [ 3.069149] regulator_bulk_free+0x40/0x58 [ 3.073203] devm_regulator_bulk_release+0x24/0x30 [ 3.077947] release_nodes+0x1f0/0x2e0 [ 3.081655] devres_release_all+0x64/0xa4 [ 3.085622] really_probe+0x1c8/0x3e0 [ 3.089245] driver_probe_device+0xe4/0x138 [ 3.093385] __device_attach_driver+0x90/0x110 [ 3.097784] bus_for_each_drv+0x8c/0xd8 [ 3.101578] __device_attach+0xdc/0x160 [ 3.105373] device_initial_probe+0x24/0x30 [ 3.109514] bus_probe_device+0x9c/0xa8 [ 3.113309] deferred_probe_work_func+0xa0/0xf0 [ 3.117796] process_one_work+0x1b4/0x408 [ 3.121762] worker_thread+0x54/0x4b8 [ 3.125384] kthread+0x12c/0x130 [ 3.128575] ret_from_fork+0x10/0x1c [ 3.132110] ---[ end trace 51a68f4c0035d6c1 ]--- [ 3.136753] dwc2: probe of c9000000.usb failed with error -22 Fixes: 5a0803bd ("ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes") Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
Add missing linking regulator node to usb bus for power usb devices. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> [ khilman: minor typo fixup ] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Anand Moon authored
As per the schematic Monolithic Power Systems MP2161GJ-C499 supply a fixed output voltage of 5.0V. This supplies linked to VDD_EE, HDMI_P5V0, USB_POWER, VCCK, VDDIO_AO1V8, VDDIO_AO3V3, VDD3V3, DDR3_1V5 according to the schematics. Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
The Ugoos AM6 is based on the Amlogic W400 (G12B) reference design using the S922X chipset. Hardware specifications: - 2GB LPDDR4 RAM - 16GB eMMC storage - 10/100/1000 Base-T Ethernet using External RGMII PHY - 802.11 a/b/g/b/ac + BT 5.0 sdio wireless (Ampak 6398S) - HDMI 2.0 (4k@60p) video - Composite video + 2-channel audio output on 3.5mm jack - S/PDIF audio output - Aux input - 1x USB 3.0 - 3x USB 2.0 - 1x micro SD card slot The device-tree is largely based on meson-g12b-odroid-n2 but with audio and USB config copied from meson-g12a-x96-max. Tested-by: Oleg Ivanov <balbes-150@yandex.ru> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
The Ugoos AM6 is based on the Amlogic W400 (G12B) reference design using the S922X chipset. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Ugoos Industrial Co., Ltd. are a manufacturer of ARM based TV Boxes/Dongles, Digital Signage and Advertisement Solutions [0]. [0] (https://ugoos.com) Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Frank Hartung authored
Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs are equal; the A53s cores are weaker than the A72s. Include capacity-dmips-mhz properties to tell the OS there is a difference in processing capacity. The dmips values are based on similar submissions for other A53/A72 SoCs: HiSilicon 3660 [1] and Rockchip RK3399 [2]. This change is particularly beneficial for use-cases like retro gaming where emulators often run on a single core. The OS now chooses an A72 core instead of an A53 core. [1] https://lore.kernel.org/patchwork/patch/862742/ [2] https://patchwork.kernel.org/patch/10836577/Signed-off-by: Frank Hartung <supervisedthinking@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jianxin Pan authored
Add basic support for the Amlogic A1 based Amlogic AD401 board: which describe components as follows: Reserve Memory, CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jianxin Pan authored
Add the compatible for the Amlogic A1 Based AD401 board. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jianxin Pan authored
Add bindings for the new Amlogic A1 SoC family. A1 is an application processor designed for smart audio and IoT applications, with dual core Cortex-A35. Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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- 03 Oct, 2019 3 commits
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Jerome Brunet authored
SM1 SoC family adds two new audio FIFOs with the related arb reset lines Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Neil Armstrong authored
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving these differential lines is shared between the USB3.0 controller and the PCIe Controller, thus only a single controller can use it. The needed DT configuration when the MCU is configured to mux the PCIe/USB3.0 differential lines to the M.2 Key M slot is added commented and may be uncommented to disable USB3.0 from the USB Complex and enable the PCIe controller. The End User is not expected to uncomment the following except for testing purposes, but instead rely on the firmware/bootloader to update these nodes accordingly if PCIe mode is selected by the MCU. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
This adds the Amlogic G12A PCI Express controller node, also using the USB3+PCIe Combo PHY. The PHY mode selection is static, thus the USB3+PCIe Combo PHY phandle would need to be removed from the USB control node if the shared differential lines are used for PCIe instead of USB3. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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