- 18 May, 2020 7 commits
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Andrey Grodzovsky authored
When this flag is set in the CS IB flags, it causes a memory cache flush of the GFX. v2: Move new flag to drm_amdgpu_cs_chunk_ib.flags Bump up UAPI version Remove condition on job != null to emit mem_sync Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Marek Olšák authored
Compute IBs need this too. v2: split out version bump v3: squash in emit frame count fixes Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Implement the .mem_sync hook defined earlier. v2: Rename functions Signed-off-by:
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Andrey Grodzovsky authored
Used to flush and invalidate various caches. v2: Rename function hook Signed-off-by:
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Kevin Wang authored
unified amdgpu device attribute node functions: 1. add some helper functions to create amdgpu device attribute node. 2. create device node according to device attr flags on different VF mode. 3. rename some functions name to adapt a new interface. v2: 1. remove ATTR_STATE_DEAD, ATTR_STATE_ALIVE enum. 2. rename callback function perform to attr_update. 3. modify some variable names Signed-off-by:
Kevin Wang <kevin1.wang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Kevin Wang authored
the swsmu or powerplay(hwmgr) need to handle task according to different VF mode, this function to help query vf mode. vf mode: 1. SRIOV_VF_MODE_BARE_METAL: the driver work on host OS (PF) 2. SRIOV_VF_MODE_ONE_VF : the driver work on guest OS with one VF 3. SRIOV_VF_MODE_MULTI_VF : the driver work on guest OS with multi VF Signed-off-by:
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Jiange Zhao authored
When GPU got timeout, it would notify an interested part of an opportunity to dump info before actual GPU reset. A usermode app would open 'autodump' node under debugfs system and poll() for readable/writable. When a GPU reset is due, amdgpu would notify usermode app through wait_queue_head and give it 10 minutes to dump info. After usermode app has done its work, this 'autodump' node is closed. On node closure, amdgpu gets to know the dump is done through the completion that is triggered in release(). There is no write or read callback because necessary info can be obtained through dmesg and umr. Messages back and forth between usermode app and amdgpu are unnecessary. v2: (1) changed 'registered' to 'app_listening' (2) add a mutex in open() to prevent race condition v3 (chk): grab the reset lock to avoid race in autodump_open, rename debugfs file to amdgpu_autodump, provide autodump_read as well, style and code cleanups v4: add 'bool app_listening' to differentiate situations, so that the node can be reopened; also, there is no need to wait for completion when no app is waiting for a dump. v5: change 'bool app_listening' to 'enum amdgpu_autodump_state' add 'app_state_mutex' for race conditions: (1)Only 1 user can open this file node (2)wait_dump() can only take effect after poll() executed. (3)eliminated the race condition between release() and wait_dump() v6: removed 'enum amdgpu_autodump_state' and 'app_state_mutex' removed state checking in amdgpu_debugfs_wait_dump Improve on top of version 3 so that the node can be reopened. v7: move reinit_completion into open() so that only one user can open it. v8: remove complete_all() from amdgpu_debugfs_wait_dump(). Signed-off-by:Jiange Zhao <Jiange.Zhao@amd.com> Reviewed-by:
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- 14 May, 2020 13 commits
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John Clements authored
Updated SMC FW version check to determine if XGMI power down control is supported Reviewed-by:
John Clements <john.clements@amd.com> Signed-off-by:
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John Clements authored
Disable XGMI link power down prior to issuing a XGMI RAS error Reviewed-by:
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John Clements authored
Reviewed-by:
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John Clements authored
Added host to SMU FW cmd to enable/disable XGMI link power down Reviewed-by:
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Colin Ian King authored
The variable ret is being initializeed with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by:Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Yintian Tao authored
There is no need to use amdgpu_mm_wreg_mmio_rlc() during initialization time because this interface is only designed for debugfs case to access the registers which are only permitted by RLCG during run-time. Therefore, turn back rlcg write for gfx_v10. If we not turn back it, it will raise amdgpu load failure. [ 54.904333] amdgpu: SMU driver if version not matched [ 54.904393] amdgpu: SMU is initialized successfully! [ 54.905971] [drm] kiq ring mec 2 pipe 1 q 0 [ 55.115416] amdgpu 0000:00:06.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring gfx_0.0.0 test failed (-110) [ 55.118877] [drm:amdgpu_device_init [amdgpu]] *ERROR* hw_init of IP block <gfx_v10_0> failed -110 [ 55.126587] amdgpu 0000:00:06.0: amdgpu_device_ip_init failed [ 55.133466] amdgpu 0000:00:06.0: Fatal error during GPU init Signed-off-by:
Yintian Tao <yttao@amd.com> Acked-by:
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Evan Quan authored
'ctxid' is used to distinguish different events raised from SMC. 0x3 and 0x4 are for AC and DC power mode. V2: update the way to retrieve the ctxid and change the log level to debug Signed-off-by:Evan Quan <evan.quan@amd.com> Reviewed-by:
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Evan Quan authored
To prevent further damage. Signed-off-by:
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Evan Quan authored
Normally this(SW CTF) should not happen. And by doing graceful shutdown we can prevent further damage. Signed-off-by:
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Andrey Grodzovsky authored
Add this for gfx10 and gfx9. v2: Fix identation Signed-off-by:
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
R-Car Display Unit & related changes: - DT bindings conversion to YAML - Planes zpos sanity check and fix - MAINTAINERS entry for LVDS panel driver Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200514012844.GA7196@pendragon.ideasonboard.com
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
amd-drm-next-5.8-2020-05-12: amdgpu: - Misc cleanups - RAS fixes - Expose FP16 for modesetting - DP 1.4 compliance test fixes - Clockgating fixes - MAINTAINERS update - Soft recovery for gfx10 - Runtime PM cleanups - PSP code cleanups amdkfd: - Track GPU memory utilization per process - Report PCI domain in topology Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
Driver Changes: - Fix GitLab #1698: Performance regression with Linux 5.7-rc1 on Iris Plus 655 and 4K screen (Chris) - Add Wa_14011059788 for Tigerlake (Matt A) - Add per ctx batchbuffer wa for timestamp for Gen12 (Mika) - Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption (Mika) - Enable DP Display Audio WA (Uma, Jani) - Update forcewake firmware ranges for Icelake (Radhakrishna) - Add missing deinitialization cases of load failure for display (Jose) - Implement TC cold sequences for Icelake and Tigerlake (Jose) - Unbreak enable_dpcd_backlight modparam (Lyude) - Move the late flush_submission in retire to the end (Chris) - Demote "Reducing compressed framebufer size" message to info (Peter) - Push MST link retraining to the hotplug work (Ville) - Hold obj->vma.lock over for_each_ggtt_vma() (Chris) - Fix timeout handling during TypeC AUX power well enabling for ICL (Imre) - Fix skl+ non-scaled pfit modes (Ville) - Prefer soft-rc6 over RPS DOWN_TIMEOUT (Chris) - Sanitize GT first before poisoning HWSP (Chris) - Fix up clock RPS frequency readout (Chris) - Avoid reusing the same logical CCID (Chris) - Avoid dereferencing a dead context (Chris) - Always enable busy-stats for execlists (Chris) - Apply the aggressive downclocking to parking (Chris) - Restore aggressive post-boost downclocking (Chris) - Scrub execlists state on resume (Chris) - Add debugfs attributes for LPSP (Ansuman) - Improvements to kernel selftests (Chris, Mika) - Add tiled blits selftest (Zbigniew) - Fix error handling in __live_lrc_indirect_ctx_bb() (Dan) - Add pre/post plane updates for SAGV (Stanislav) - Add ICL PG3 PW ID for EHL (Anshuman) - Fix Sphinx build duplicate label warning (Jani) - Error log non-zero audio power refcount after unbind (Jani) - Remove object_is_locked assertion from unpin_from_display_plane (Chris) - Use single set of AUX powerwell ops for gen11+ (Matt R) - Prefer drm_WARN_ON over WARN_ON (Pankaj) - Poison residual state [HWSP] across resume (Chris, Tvrtko) - Convert request-before-CS assertion to debug (Chris) - Carefully order virtual_submission_tasklet (Chris) - Check carefully for an idle engine in wait-for-idle (Chris) - Only close vma we open (Chris) - Trace RPS events (Chris) - Use the RPM config register to determine clk frequencies (Chris) - Drop rq->ring->vma peeking from error capture (Chris) - Check preempt-timeout target before submit_ports (Chris) - Check HWSP cacheline is valid before acquiring (Chris) - Use proper fault mask in interrupt postinstall too (Matt R) - Keep a no-frills swappable copy of the default context state (Chris) - Add atomic helpers for bandwidth (Stanislav) - Refactor setting dma info to a common helper from device info (Michael) - Refactor DDI transcoder code for clairty (Ville) - Extend PG3 power well ID to ICL (Anshuman) - Refactor PFIT code for readability and future extensibility (Ville) - Clarify code split between intel_ddi.c and intel_dp.c (Ville) - Move out code to return the digital_port of the aux ch (Jose) - Move rps.enabled/active and use of RPS interrupts to flags (Chris) - Remove superfluous inlines and dead code (Jani) - Re-disable -Wframe-address from top-level Makefile (Nick) - Static checker and spelling fixes (Colin, Nathan) - Split long lines (Ville) Signed-off-by:
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- 13 May, 2020 7 commits
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Tomohito Esaki authored
According to drm_plane_create_zpos_property() function documentation, all planes zpos range should be set if zpos property is supported. However, the rcar-du driver didn't set primary plane zpos range. Since the primary plane's zpos is fixed, set it immutably. Reported-by:
Yoshihito Ogawa <yoshihito.ogawa.kc@renesas.com> Reported-by:
Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by:
Tomohito Esaki <etom@igel.co.jp> Reviewed-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> [Turn continue into if ... else ...] Signed-off-by:
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Laurent Pinchart authored
The zpos property is used by userspace to sort the order of planes. While the property is not mandatory for drivers to implement, mixing planes with and without zpos confuses userspace, and shall not be allowed. Clarify this in the documentation and warn at runtime if the drivers mixes planes with and without zpos properties. Signed-off-by:
Sam Ravnborg <sam@ravnborg.org> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Laurent Pinchart authored
As the DRM LVDS panel driver uses a different approach to DT bindings compared to what Thierry Reding advocates, add a specific MAINTAINERS entry to avoid bothering Thierry with requests related to that driver. Signed-off-by:
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Geert Uytterhoeven authored
Document the optional properties for describing module resets, to support resetting display channels on R-Car Gen2 and Gen3. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
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Laurent Pinchart authored
Convert the Thine THC63LVD1024 text binding to YAML. Signed-off-by:
Maxime Ripard <mripard@kernel.org> Reviewed-by:
Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by:
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Laurent Pinchart authored
The simple-bridge driver supports multiple simple or dumb bridges, covered by different compatible strings but otherwise identical DT bindings. Some of those bridges have undocumented bindings, while others are documented in text form in separate files. Group them all in a single binding and convert it to YAML. The psave-gpios property of the adi,adv7123 is dropped, as it isn't supported by the driver and isn't specified in any DT file upstream. Support for power saving is available through the enable-gpios property that should cover all the needs of the ADV7123 (as the device only has a /PSAVE pin and no enable pin). Signed-off-by:
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Laurent Pinchart authored
Document the #address-cells and #size-cells properties of the ports node in the schemas of the bridge DT bindings, and set additionalProperties to false to reject additional properties. Signed-off-by:
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- 11 May, 2020 5 commits
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Jason Yan authored
Fix the following gcc warning: drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c:65:18: warning: ‘crtc_offsets’ defined but not used [-Wunused-const-variable=] static const u32 crtc_offsets[6] = ^~~~~~~~~~~~ Reported-by:Hulk Robot <hulkci@huawei.com> Signed-off-by:
Jason Yan <yanaijie@huawei.com> Signed-off-by:
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Leo (Hanghong) Ma authored
[Why] For MST case: when update_config is called to disable a stream, this clears the settings for all the streams on that link. We should only clear the settings for the stream that was disabled. [How] Clear the settings after the call to remove display is called. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by:
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Tom St Denis authored
Requested bits for UMR support Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Tom St Denis authored
On my raven1 system (rev c6) with VBIOS 113-RAVEN-114 GFXOFF is not stable (resulting in large block tiling noise in some applications). Disabling GFXOFF via the quirk list fixes the problems for me. Signed-off-by:
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Jane Jian authored
since for sriov, baco happens on host side, no need and meaning to judge is baco. also, since kiq reads strap0 in here, if kiq is not ready or gpu reset(kiq resume) happens after this read, would fail to read and wrongly set baco as true(1). Acked-by:
Jane Jian <Jane.Jian@amd.com> Signed-off-by:
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- 08 May, 2020 8 commits
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Alex Deucher authored
We only need to set DPM_FLAG_NEVER_SKIP for the legacy ATPX BOCO case. D3cold and BACO work as expected. Acked-by:
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Alex Deucher authored
The core handles this for us. Acked-by:
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Alex Deucher authored
We should be checking whether the driver enabled runtime pm rather than whether the asic supports BOCO or BACO. That said in general they are equivalent unless the user has disabled runpm or it has been disabled for a specific asic. Reviewed-by:
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Alex Deucher authored
The pci core handles this for us in pci_pm_init. Acked-by:
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Alex Deucher authored
Same as gfx9. This allows us to kill the waves for hung shaders. Acked-by:
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Nirmoy Das authored
Create sysfs file using attributes. Signed-off-by:
Nirmoy Das <nirmoy.das@amd.com> Reviewed-by:
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Evan Quan authored
BACO is needed to support hibernate on Navi1X. Signed-off-by:
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Hawking Zhang authored
physical_node_id * node_segment_size should be the dram_base_address for current gpu node in xgmi config Signed-off-by:
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