1. 18 Nov, 2010 2 commits
    • Paul Mundt's avatar
      ARM: mach-shmobile: Split out entry-macros in to GIC and INTC variants. · 45bbaae0
      Paul Mundt authored
      Presently the entry macros are all globbed together, this simply splits
      them out in to their insular variants. Future work such as the GIC
      generalization will replace some of these and tidy the abstraction up
      further.
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      45bbaae0
    • Magnus Damm's avatar
      ARM: mach-shmobile: Initial AG5 and AG5EVM support · 6d9598e2
      Magnus Damm authored
      This patch adds initial support for Renesas SH-Mobile AG5.
      
      At this point the AG5 CPU support is limited to the ARM
      core, SCIF serial and a CMT timer together with L2 cache
      and the GIC. The AG5EVM board also supports Ethernet.
      
      Future patches will add support for GPIO, INTCS, CPGA
      and platform data / driver updates for devices such as
      IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
      
      The code in entry-macro.S will be cleaned up when the
      ARM IRQ demux code improvements have been merged.
      
      Depends on the AG5EVM mach-type recently registered but
      not yet present in arch/arm/tools/mach-types.
      
      As the AG5EVM board comes with 512MiB memory it is
      recommended to turn on HIGHMEM.
      
      Many thanks to Yoshii-san for initial bring up.
      Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      6d9598e2
  2. 16 Nov, 2010 2 commits
    • Paul Mundt's avatar
      ARM: mach-shmobile: Tidy up the Kconfig bits. · 6d72ad35
      Paul Mundt authored
      Presently each one of the CPUs manually selects the same feature set, and
      there's a reasonable expectation that none of these will change for
      future CPUs in the SH-Mobile / R-Mobile family, so we move those over to
      the top-level ARCH_SHMOBILE.
      
      While we're at it, all of the CPUs support optional GPIOs via the PFC,
      do not have I/O ports, and expect sparse IRQ, so we bring the
      configuration in line across the board.
      
      This more or less brings the ARM-based parts in sync with their SH
      counterparts.
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      6d72ad35
    • Linus Torvalds's avatar
      Linux 2.6.37-rc2 · e53beacd
      Linus Torvalds authored
      e53beacd
  3. 15 Nov, 2010 33 commits
  4. 14 Nov, 2010 3 commits