- 26 May, 2017 40 commits
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David S. Miller authored
Nathan Fontenot says: ==================== ibmvnic: Driver updates This set of patches implements several updates to the ibmvnic driver to fix issues that have been found in testing. Most of the updates invovle updating queue handling during driver close and reset operations. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Nathan Fontenot authored
When the ibmvnic driver is resetting, we can just reset the sub crqs instead of releasing all of their resources and re-allocting them. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Nathan Fontenot authored
When resetting the ibmvnic driver there is not a need to release and re-allocate the resources for the tx and rx pools. These resources can just be reset to avoid the re-allocations. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Nathan Fontenot authored
When a driver reset operation occurs there is not a need to release the CRQ resources and re-allocate them. Instead a reset of the CRQ will suffice. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Nathan Fontenot authored
We do not want to process any receive frames if the ibmvnic_poll routine is invoked while a reset is in process. Also, before replenishing the rx pools in the ibmvnic_poll, we want to make sure the adapter is not in the process of closing. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Thomas Falcon authored
If H_CLOSED is returned, halt RX buffer replenishment activity until firmware sends a notification that the driver can reset. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Thomas Falcon authored
This patch disables transmissions and reports carrier off if xmit function returns that the hardware TX queue is closed. The driver can then await a signal from firmware to determine the correct reset method. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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John Allen authored
Handle non-fatal error conditions. The process to do this when resetting the driver is to just do __ibmvnic_close followed by __ibmvnic_open. Signed-off-by: John Allen <jallen@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Thomas Falcon authored
A race condition occurs when closing the driver. Free'ing of skb's can race between the close routine and ibmvnic_tx_interrupt. To fix this we move the claenup of tx pools during close to after the sub-CRQ interrupts are disabled. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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John Allen authored
Send gratuitous arp after any reset. Signed-off-by: John Allen <jallen@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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John Allen authored
Handle case where phyp sends a failover after failing to send the init crq. Signed-off-by: John Allen <jallen@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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John Allen authored
Track the state of ibmvnic napis. The driver can get into states where it can be reset when napis are already disabled and attempting to disable them again will cause the driver to hang. Signed-off-by: John Allen <jallen@linux.vnet.ibm.com> Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Jiri Pirko says: ==================== mlxsw: Improve extensibility Ido says: Since the initial introduction of the bridge offload in commit 56ade8fe ("mlxsw: spectrum: Add initial support for Spectrum ASIC") the per-port struct was used to store both physical properties of the port as well as logical bridge properties such as learning and active VLANs in the VLAN-aware bridge. The above resulted in a bloated struct and code that is getting increasingly difficult to extend when stacked devices are taken into account as well as more advanced use cases such as IGMP snooping. Due to the incremental development nature of this driver as well as the complexity of the underlying hardware, subsequent design decisions failed to generalize the FID and RIF resources, which could've benefited from a more generic design, resulting in consolidated code paths and better extensibility with regards to future ASICs and use cases. This patchset tries to solve both of these design problems, as they're tightly coupled. To ease the code review, the changes are done in a bottom-up manner, in which the port struct is the first to be patched, then the FIDs the ports are mapped to and finally the RIFs configured on top. The first half of the patchset gradually moves away from the previous design to a design that is more in sync with the underlying hardware and which clearly separates between hardware-specific structs and logical ones such as a bridge port. All the bridge-specific information is removed from the port struct, as well as the list of VLAN devices ("vPorts") configured on top of it. Instead, a linked list of VLANs is introduced, which allows each VLAN to hold a state, such as mapping to a particular FID and membership in a bridge. The data structures are depicted in the following figure: mlxsw_sp_bridge_device +----------+ | | +----+ | | | | | +----------+ | mlxsw_sp_bridge_port | +----------+ | | | | +--> +-----+--> .. | | | | +----+-----+ | | | v | mlxsw_sp_bridge_vlan | +----------+ | | vid X | | | +--> .. | | | | +----+-----+ | | +--+----v-----+ | vid X | +--+ +--> .. | | | mlxsw_sp_port | +----------+ +----------+ | mlxsw_sp_port_vlan | | | | +--+ | | +----------+ This model allows us to consolidate many of the code paths relating to VLAN-aware and VLAN-unaware bridges, as the latter is simply represented using a bridge port with a VLAN list size of one. Another advantage of the model is that it's easy to extend it with future per-VLAN attributes - such as mrouter indication - by merely pushing these down from the bridge port struct to the bridge VLAN one. The second half of the patchset builds on top of previous work and prepares the driver for the common FID and RIF cores, which are finally implemented in the last two patches. These exploit the fact that despite the different kinds of FIDs and RIFs, they do share a common object on which the core operations can operate on. By hiding both objects from the rest of the driver and modeling their operations using a VFT, it'll be easier to extend the driver for future use cases such as VXLAN. Tested using following LNST recipes: https://github.com/jpirko/lnst/tree/master/recipes/switchdev ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
The mlxsw driver currently implements three types of RIFs. VLAN and FID RIFs for L3 interfaces on top of VLAN-aware and VLAN-unaware bridges (respectively) and Subport RIFs for all other L3 interfaces. All the RIF types follow a common configuration procedure, which only differs in the type-specific bits. The patch exploits this fact and consolidates the common code paths, thereby simplifying the code and making it more extensible. This work also prepares the driver for use with future ASICs, where the range of the Subport RIFs will be extended and their configuration modified accordingly. By merely implementing a new RIF operations and selecting it during initialization, the same driver could be re-used. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
The device supports three types of FIDs. 802.1Q and 802.1D FIDs for VLAN-aware and VLAN-unaware bridges (respectively) and rFIDs to transport packets to the router block. The different users (e.g., bridge, router, ACLs) of the FIDs infrastructure need not know about the internal FIDs implementation and can therefore interact with it using a restricted set of exported functions. By encapsulating the entire FID logic and hiding it from the rest of the driver we get a code base that it much simpler and easier to work with and extend. For example, in the current Spectrum ASIC only 802.1D FIDs can be assigned a VNI, but future ASICs will also support 802.1Q FIDs. With this patch in place, support for future ASICs can be easily added by implementing a new FID operations according to their capabilities. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
All RIF types are associated with a virtual router (VR), so determine VR first when creating a RIF. That way, we can more easily integrate the common RIF core in the following patches. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
If a packet ingress the router but can't be assigned an ingress RIF, it's dropped. Therefore, in the case of RIF configured on top of a bridge, it makes sense to start flooding broadcast packets to the router only after the RIF was created. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
Now that all the information to create a RIF is contained within the RIF struct itself, we can also simplify the destruction logic. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
All the information necessary for the configuration of RIFs can now be found in the RIF struct itself, so reduce the arguments list. This gets us one step closer to the common RIF core. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
Currently, when a Subport RIF is configured, the LAG status and VLAN of the underlying port are read from the port itself. This is problematic, as we would like to have common code to configure all types of RIFs, which aren't necessarily bound to a port. Instead, embed the RIF in a struct specific to the Subport type, which contains all the necessary information. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
In the following patches the RIF's configuration function is going to expect a RIF struct with all the necessary information. Therefore, allocate the RIF just before it's configured to the device. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
The following patches are going to re-arrange the FID and RIF code, so that when the RIF is configured to the device based on the information present in the RIF struct (which points to a FID). For this reason, move the FID allocation to just before the RIF configuration. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
As explained in the cover letter, since the introduction of the bridge offload in the mlxsw driver, information related to the offloaded bridge and bridge ports was stored in the individual port struct, mlxsw_sp_port. This lead to a bloated struct storing both physical properties of the port (e.g., autoneg status) as well as logical properties of an upper bridge port (e.g., learning, mrouter indication). While this might work well for simple devices, it proved to be hard to extend when stacked devices were taken into account and more advanced use-cases (e.g., IGMP snooping) considered. This patch removes the excess information from the above struct and instead stores it in more appropriate structs that represent the bridge port, the bridge itself and a VLAN configured on the bridge port. The membership of a port in a bridge is denoted using the Port-VLAN struct, which points to the bridge port and also member in the bridge VLAN group of the VLAN it represents. This allows us to completely remove the vPort abstraction and consolidate many of the code paths relating to VLAN-aware and unaware bridges. Note that the FID / vFID code is currently duplicated, but this will soon go away when the common FID core will be introduced. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
Up until now we used to create FIDs upon the creation of VLAN uppers on top of the VLAN-aware bridge. This was done so that in case a router interface (RIF) was configured on top of the bridge, the FID would already be there. Instead, simplify the code and only create the FID upon RIF creation. This is an intermediary step towards the introduction of the common FID core, in which this code would be completely removed. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
Currently, when port netdevs (or their uppers) are enslaved to a bridge, we simply propagate the CHANGEUPPER event all the way down and lose the context of the actual netdevice used as the bridge port. This leads to a lot of information hanging off the ports (and vPorts), which doesn't logically belong there, such as mrouter indication and unknown unicast flood state. Following patches are going to put the mlxsw_sp_port struct on diet and instead introduce a bridge port struct, where the above mentioned information belongs. But in order to do that, we need to be able to determine the bridge port netdevice, so propagate it down. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
We're going to get rid of vPorts completely later in the patchset, but the router code is self-contained, so it's a good candidate to start the transition with. Convert all the functions that expects to operate on a vPort to operate on a Port-VLAN instead. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
When a vPort is destroyed, it leaves the FID it's currently mapped to (if any) and drops the reference. The FID's leave function expects to get the vPort as its argument, but this will have to change when the vPort model is retired. Change the function signature to expect a Port-VLAN struct instead and patch the call sites accordingly. The code introduced in this patch will be removed later in the patchset, but this intermediary step is required in order to ease the code review. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
This is the first step in the transition from the vPort model to a unified Port-VLAN structure. The new structure is defined and created / destroyed upon invocation of the 8021q ndos, but it's not actually used throughout the code. Subsequent patches will initialize it correctly and also create / destroy it upon switchdev's VLAN object. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
We currently transition the port to "Virtual mode" upon the creation of its first VLAN upper, as we need to classify incoming packets to a FID using {Port, VID} and not only the VID. However, it's more appropriate to transition the port to this mode when the {Port, VID} are actually mapped to a FID. Either during the enslavement of the VLAN upper to a VLAN-unaware bridge or the configuration of a router port. Do this change now in preparation for the introduction of the FID core, where this operation will be encapsulated. To prevent regressions, this patch also explicitly configures an OVS slave to "Virtual mode". Otherwise, a packet that didn't hit an ACL rule could be classified to an existing FID based on a global VID-to-FID mapping, thus not incurring a FID mis-classification, which would otherwise trap the packet to the CPU to be processed by the OVS daemon. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
During enslavement to a bridge, after the CHANGEUPPER is sent, the multicast enabled state of the bridge isn't propagated down to the offloading driver unless it's changed. This patch allows such drivers to query the multicast enabled state from the bridge, so that they'll be able to correctly configure their flood tables during port enslavement. In case multicast is disabled, unregistered multicast packets can be treated as broadcast and be flooded through all the bridge ports. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
It's useful for drivers supporting bridge offload to be able to query the bridge's VLAN filtering state. Currently, upon enslavement to a bridge master, the offloading driver will only learn about the bridge's VLAN filtering state after the bridge device was already linked with its slave. Being able to query the bridge's VLAN filtering state allows such drivers to forbid enslavement in case resource couldn't be allocated for a VLAN-aware bridge and also choose the correct initialization routine for the enslaved port, which is dependent on the bridge type. Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Andrew Lunn says: ==================== net: dsa: mv88e6xxx: Add basic SERDES support Some of the Marvell switches are SERDES interface, which must be powered up before packets can be passed. This is particularly true on the 6390, where the SERDES defaults to down, probably to save power. This series refactors the existing SERDES support for the 6352, and adds 6390 support. v2: Split phy functions out into phy.[ch] Don't add MV88E6XXX_FLAG_G1_ATU_FID back again Move the serdes op up in mv88e6xxx_ops Move some #defines into serdes.h Add a mv88e6xxx_serdes_power() Don't keep moving calls to this helper around in the code v3: Move more phy functions into phy.[ch] Make mv88e6xxx_phy_page_get() and mv88e6xxx_phy_page_put static Use the mv88e6xxx_serdes_power() helper everywhere dev_err(...) when mv88e6xxx_serdes_power() fails Add reviewed-by's ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
Implement the port enable/disable callbacks, which enable/disable the SERDES interfaces, if applicable. This should save a bit of power/heat. We also need to enable SERDES on CPU and DSA ports, so keep the existing call to the op, but make it conditional. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
The mv88e6390X family has 8 SERDES lanes. These can be used for 2 10Gbps ports, ports 9 or 10. If these ports are used at slower speeds, the SERDES lanes become available for other ports for 1000Base-X. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
Now that we use an op for SERDES operations, we don't need a flag for it. Remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
The mv88e6390 family has a different SERDES implementation. Refactor the mv88e6352 code into an ops function, so we can later add the mv88e6390 code. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
The upcoming SERDES support will need to make use of PHY functions. Move them out into a file of there own. No code changes. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Uwe Kleine-König authored
Instead of falling back to 00:00:00:00:00:00 generate a random address if none is provided via platform data or from the device's register space. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Andrew Lunn says: ==================== More marvell phy cleanups This patchset continues the cleanup of the Marvell PHY driver. These phys use pages to allow more than the 32 registers that fit into the MDIO address space. Cleanup the code used for changing pages. v2 Reverse christmas tree ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Andrew Lunn authored
Bring all the page names together, remove the repeats, and make them uniform. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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