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  1. 28 Jul, 2015 1 commit
    • Gregory CLEMENT's avatar
      ARM: mvebu: Warn about the wake-up sources not taken into account in suspend · 482d638f
      Gregory CLEMENT authored
      On the Armada 370/XP/38x/39x SoCs when the suspend to ram feature is
      supported, the SoCs are shutdown and will be woken up by an external
      micro-controller, so there is no possibility to setup wake-up sources
      from Linux. However, in standby mode, the SoCs stay powered and it is
      possible to wake-up from any interrupt sources. Since when the users
      configures the enabled wake-up sources there is no way to know if the
      user will be doing suspend to RAM or standby, we just allow all
      wake-up sources to be enabled, and only warn when entering suspend to
      RAM
      
      The purpose of this patch is to inform the user that in suspend to ram
      mode, the wake-up sources won't be taken into consideration.
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      482d638f
  2. 25 Jul, 2015 4 commits
  3. 30 Nov, 2014 1 commit
    • Thomas Petazzoni's avatar
      ARM: mvebu: implement suspend/resume support for Armada XP · 8446be5d
      Thomas Petazzoni authored
      This commit implements the core of the platform code to enable
      suspend/resume on Armada XP. It registers the platform_suspend_ops
      structure, and implements the ->enter() hook of this structure.
      
      It is worth mentioning that this commit only provides the SoC-level
      part of suspend/resume, which calls into some board-specific code
      provided in a follow-up commit.
      
      The most important thing that this SoC-level code has to do is to
      build an in-memory structure that contains a magic number, the return
      address in the kernel after resume, and a set of address/value
      pairs. This structure is used by the bootloader to restore a certain
      number of registers (according to the set of address/value pairs) and
      then jump back into the kernel at the provided location.
      
      The code also puts the SDRAM into self-refresh mode, before calling
      into board-specific code to actually enter the suspend to RAM state.
      
      [ jac - add email exchange between Andrew Lunn and Thomas Petazzoni to better
      describe who consumes the address/value pairs ]
      
      > > Is this a well defined mechanism supported by mainline uboot, barebox
      > > etc. Or is it some Marvell extension to their uboot?
      >
      > As far as I know, it is a Marvell extension to their "binary header",
      > so it's done even before U-Boot starts. Since the hardware needs
      > assistance from the bootloader to do suspend/resume, there is
      > necessarily a certain amount of cooperation/agreement needed by what
      > the kernel does and what the bootloader expects. I'm not sure there's
      > any "standard" mechanism here. Do you know of any?
      >
      > I know the suspend/resume on the Blackfin architecture works the same
      > way (at least it used to work that way years ago when I did a bit of
      > Blackfin stuff). And here as well, there was some cooperation between
      > the kernel and the bootloader. See
      > arch/blackfin/mach-common/dpmc_modes.S, function do_hibernate() at the
      > end.
      >
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Link: https://lkml.kernel.org/r/1416585613-2113-10-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
      8446be5d