- 10 Dec, 2016 3 commits
-
-
Christophe Leroy authored
8xx uses a two level page table with two different linux page size support (4k and 16k). 8xx also support two different hugepage sizes 512k and 8M. In order to support them on linux we define two different page table layout. The size of pages is in the PGD entry, using PS field (bits 28-29): 00 : Small pages (4k or 16k) 01 : 512k pages 10 : reserved 11 : 8M pages For 512K hugepage size a pgd entry have the below format [<hugepte address >0101] . The hugepte table allocated will contain 8 entries pointing to 512K huge pte in 4k pages mode and 64 entries in 16k pages mode. For 8M in 16k mode, a pgd entry have the below format [<hugepte address >1101] . The hugepte table allocated will contain 8 entries pointing to 8M huge pte. For 8M in 4k mode, multiple pgd entries point to the same hugepte address and pgd entry will have the below format [<hugepte address>1101]. The hugepte table allocated will only have one entry. For the time being, we do not support CPU15 ERRATA when HUGETLB is selected Signed-off-by:
Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> (v3, for the generic bits) Signed-off-by:
Scott Wood <oss@buserror.net>
-
Christophe Leroy authored
Today there are two implementations of hugetlbpages which are managed by exclusive #ifdefs: * FSL_BOOKE: several directory entries points to the same single hugepage * BOOK3S: one upper level directory entry points to a table of hugepages In preparation of implementation of hugepage support on the 8xx, we need a mix of the two above solutions, because the 8xx needs both cases depending on the size of pages: * In 4k page size mode, each PGD entry covers a 4M bytes area. It means that 2 PGD entries will be necessary to cover an 8M hugepage while a single PGD entry will cover 8x 512k hugepages. * In 16 page size mode, each PGD entry covers a 64M bytes area. It means that 8x 8M hugepages will be covered by one PGD entry and 64x 512k hugepages will be covers by one PGD entry. This patch: * removes #ifdefs in favor of if/else based on the range sizes * merges the two huge_pte_alloc() functions as they are pretty similar * merges the two hugetlbpage_init() functions as they are pretty similar Signed-off-by:
-
Christophe Leroy authored
Today powerpc64 uses a set of pgtable_caches while powerpc32 uses standard pages when using 4k pages and a single pgtable_cache if using other size pages. In preparation of implementing huge pages on the 8xx, this patch replaces the specific powerpc32 handling by the 64 bits approach. This is done by: * moving 64 bits pgtable_cache_add() and pgtable_cache_init() in a new file called init-common.c * modifying pgtable_cache_init() to also handle the case without PMD * removing the 32 bits version of pgtable_cache_add() and pgtable_cache_init() * copying related header contents from 64 bits into both the book3s/32 and nohash/32 header files On the 8xx, the following cache sizes will be used: * 4k pages mode: - PGT_CACHE(10) for PGD - PGT_CACHE(3) for 512k hugepage tables * 16k pages mode: - PGT_CACHE(6) for PGD - PGT_CACHE(7) for 512k hugepage tables - PGT_CACHE(3) for 8M hugepage tables Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by:
-
- 05 Dec, 2016 4 commits
-
-
Wei Yongjun authored
Use resource_size function on resource object instead of explicit computation. Generated by: scripts/coccinelle/api/resource_size.cocci Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by:
-
Geliang Tang authored
Use builtin_platform_driver() helper to simplify the code. Signed-off-by:
Geliang Tang <geliangtang@gmail.com> Signed-off-by:
-
Geliang Tang authored
Use builtin_platform_driver() helper to simplify the code. Signed-off-by:
-
Geliang Tang authored
Use builtin_platform_driver() helper to simplify the code. Signed-off-by:
-
- 24 Nov, 2016 1 commit
-
-
Claudiu Manoil authored
The hardware descriptors have big endian (BE) format. Provide proper endianness handling for the remaining descriptor fields, to ensure they are correctly accessed by non-BE CPUs too. Signed-off-by:
Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by:
-
- 23 Nov, 2016 21 commits
-
-
Claudiu Manoil authored
Signed-off-by:
-
Claudiu Manoil authored
There are multiple occurences of both contextB and context_b in different h/w descriptors, referring to the same descriptor field known as "Context B". Stick with the "context_b" naming, for obvious reasons including consistency (see also context_a). Signed-off-by:
-
Claudiu Manoil authored
Signed-off-by:
-
Claudiu Manoil authored
ORP ("Order Restoration Point") mechanism not supported. Signed-off-by: -
Claudiu Manoil authored
Preventively mask every access to the 'fqid' h/w field, since it is defined as a 24-bit field, for every h/w descriptor. Add generic accessors for this field to ensure correct access. Signed-off-by:
-
Claudiu Manoil authored
1. qm_mcc_querywq layout not used for now, so drop it; 2. queryfq, queryfq_np and alterfq are used only for accesses to the 'fqid' field, so replace these with a generic 'fq' layout. As a consequence, 'querycgr' turns into 'cgr' following the same reasoning above and for consistent naming. Signed-off-by:
-
Claudiu Manoil authored
opts is checked redundantly. Move local_opts declaration inside its usage scope. Signed-off-by:
-
Claudiu Manoil authored
Replace dummy platform device hack with a reference to a portal's platform device, in order to dma map the test frame for this small unit test. The 2 qman symbols need to be exported because this self test is a kernel module. Signed-off-by:
-
Claudiu Manoil authored
The qman portals are platform devices themselves, so they should handle dma mappings. Creating a dummy platform device in order to support dma mapping operations is not justified (and not portable). Instead, do the mapping against the first portal that has been initialised. Signed-off-by:
-
Claudiu Manoil authored
This function must only return the truth value of whether two frame descriptors are different or not. It does NOT have to compute some obscure difference between fd fields and return it as an int, making sparse complain about type conversions in the process. Signed-off-by:
-
Claudiu Manoil authored
Use the proper accessor to get the FD address. Accessing the internal field "addr_lo" directly is not portable and error prone. Signed-off-by:
-
Claudiu Manoil authored
context_a.hi is 32bit Signed-off-by:
-
Claudiu Manoil authored
In case init_pcfg() returns with error the CI region must be unmapped too. Signed-off-by:
-
Claudiu Manoil authored
qman_query_fq*() may return other error codes apart from -ERANGE, in which cases the error handling done by the resource cleanup callers would be wrong. The patch fixes the handling of those cases, and cleans up related code inside the resource cleanup & release handlers (i.e. replace hardcoded fqid value with corresponding define). Signed-off-by:
-
Madalin Bucur authored
Use arch portable of_property_read_u32() instead, which takes care of endianness conversions. Signed-off-by:
Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by:
-
Madalin Bucur authored
Signed-off-by:
-
Andy Fleming authored
These config changes build: drivers/power/reset/gpio-poweroff.c drivers/power/reset/gpio-restart.c Signed-off-by:
Andy Fleming <afleming@gmail.com> Signed-off-by:
-
Heiner Kallweit authored
Use of_property_read_u32 instead of the generic of_get_property to simplify the code. In addition move the declaration of fs_baudrate into get_baudrate because it's private to this function. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
-
Heiner Kallweit authored
Use of_property_read_u32 instead of the generic of_get_property to simplify the code. In addition move the declaration of brgfreq into get_brgfreq because it's private to this function. Signed-off-by:
-
Heiner Kallweit authored
Use of_property_read_u32 instead of the generic of_get_property to simplify the code. In addition move the declaration of sysfreq into fsl_get_sys_freq because it's private to this function. Signed-off-by:
-
David Engraf authored
The QEMU e500 board needs to enable CONFIG_E500 to correctly boot. QEMU for ppc64 uses e5500/e6500 emulation, thus CONFIG_PPC_E500MC is required as well. Signed-off-by:
David Engraf <david.engraf@sysgo.com> Signed-off-by:
-
- 22 Nov, 2016 3 commits
-
-
Colin Ian King authored
Trivial fix to spelling mistake "uncommited" to "uncommitted" in critical error messages. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
-
Florian Larysch authored
The T4240RDB contains a W83793 hardware monitoring chip. Add a device tree entry to make the driver attach to it, as the i2c-mpc bus driver dropped support for class-based instantiation of devices a long time ago. Signed-off-by:
Florian Larysch <fl@n621.de> Signed-off-by:
-
Florian Larysch authored
Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
- 17 Nov, 2016 8 commits
-
-
Suraj Jitindar Singh authored
Version 3.00 of the ISA states that the PATS (partition table size) field of the PTCR (partition table control register) and the PRTS (process table size) field of the partition table entry must both be less than or equal to 24. However the actual size of the partition and process tables is equal to 2 to the power of 12 plus the PATS and PRTS fields, respectively. This means that the max allowable size of each of these tables is 2^36 or 64GB for both. Thus when checking the size shift for each we should be checking for values of greater than 36 instead of the current check for shifts larger than 24 and 23. Fixes: 2bfd65e4Signed-off-by:
Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by:
Balbir Singh <bsingharora@gmail.com> Reviewed-by:
Michael Ellerman <mpe@ellerman.id.au>
-
Anshuman Khandual authored
This patch adds ptrace interface test for TM SPR registers. This also adds ptrace interface based helper functions related to TM SPR registers access. Signed-off-by:
Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by:
Simon Guo <wei.guo.simon@gmail.com> Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for VSX, VMX registers inside suspended TM context. Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for VSX, VMX registers inside TM context. This also adds ptrace interface based helper functions related to chckpointed VSX, VMX registers access. Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for VSX, VMX registers. This also adds ptrace interface based helper functions related to VSX, VMX registers access. This also adds some assembly helper functions related to VSX and VMX registers. Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for TAR, PPR, DSCR registers inside suspended TM context. Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for TAR, PPR, DSCR registers inside TM context. This also adds ptrace interface based helper functions related to checkpointed TAR, PPR, DSCR register access. Signed-off-by:
-
Anshuman Khandual authored
This patch adds ptrace interface test for TAR, PPR, DSCR registers. This also adds ptrace interface based helper functions related to TAR, PPR, DSCR register access. Signed-off-by:
-
