- 27 Jun, 2013 40 commits
-
-
Alex Deucher authored
Add a helper function to determine the preferred pcie gen based on the card, system, and circumstance. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Add a way to look up the bootup mvdd. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Validate the voltages against the voltage requirements of the dispclk. We currently don't adjust the disp clock so it never changes, but we need to filter out voltage levels that are too low none the less. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Forgot to free some structs when allocation fails for some tables. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Use the new fixed point functions for leakage calculations on cayman. v2: fix up 64 bit math Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Required for certain driver calculations. Code was written by Christian König and ported to the drm by me. v2: fix 64 bit divides v3: fix 64 bit for real (math64.h) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Consolidate the non-register defines. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Required for SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Used by SI dpm. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Required for dpm on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This makes it easier the understand what the code is doing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Only Cape Verde supports power gating. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
These are needed for certain UVD power saving features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This is required for certain power management features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Enables PCIE ASPM (Active State Power Management) on SI asics. v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Enables PCIE ASPM (Active State Power Management) on evergreen-cayman asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Required for accessing certain pcie related registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
If both the motherboard and GPU support pcie gen2 or 3, enable it. PCIE gen2 and 3 offer more bandwidth than pcie gen1. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
SI uses a new atom table revision. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
SI uses a new atom table. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
There's a new table for calculating the memory pll parameters on SI. Required for SI DPM support. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
These functions use acpi methods to adjust the pcie gen speed. Used by DPM. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Use the new asic callback instead. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Now that the proper fix has been implemented I can remove the last remnants of the initial implementation. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
For r6xx-evergreen, they are no-ops as they don't support any dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-