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- 12 Mar, 2020 1 commit
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Freeman Liu authored
This patch adds the support for Spreadtrum thermal sensor controller, which can support maximum 8 sensors. Signed-off-by:
Freeman Liu <freeman.liu@unisoc.com> Co-developed-with: Baolin Wang <baolin.wang@unisoc.com> Signed-off-by:
Baolin Wang <baolin.wang7@gmail.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/ebeb2839cff4d4027b37e787427c5af0e11880c8.1582013101.git.baolin.wang7@gmail.com
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- 27 Jan, 2020 4 commits
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Yangtao Li authored
This patch adds the support for allwinner thermal sensor, within allwinner SoC. It will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by:
Yangtao Li <tiny.windzz@gmail.com> Signed-off-by:
Ondrej Jirman <megous@megous.com> Signed-off-by:
Vasily Khoruzhick <anarsoul@gmail.com> Acked-by:
Maxime Ripard <mripard@kernel.org> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191219172823.1652600-2-anarsoul@gmail.com
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Daniel Lezcano authored
As we introduced the idle injection cooling device called cpuidle_cooling, let's be consistent and rename the cpu_cooling to cpufreq_cooling as this one mitigates with OPPs changes. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by:
Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/20191219225317.17158-3-daniel.lezcano@linaro.org
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Daniel Lezcano authored
The cpu idle cooling device offers a new method to cool down a CPU by injecting idle cycles at runtime. It has some similarities with the intel power clamp driver but it is actually designed to be more generic and relying on the idle injection powercap framework. The idle injection duration is fixed while the running duration is variable. That allows to have control on the device reactivity for the user experience. An idle state powering down the CPU or the cluster will allow to drop the static leakage, thus restoring the heat capacity of the SoC. It can be set with a trip point between the hot and the critical points, giving the opportunity to prevent a hard reset of the system when the cpufreq cooling fails to cool down the CPU. With more sophisticated boards having a per core sensor, the idle cooling device allows to cool down a single core without throttling the compute capacity of several cpus belonging to the same clock line, so it could be used in collaboration with the cpufreq cooling device. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20191219225317.17158-2-daniel.lezcano@linaro.org
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Daniel Lezcano authored
The next changes will add a new way to cool down a CPU by injecting idle cycles. With the current configuration, a CPU cooling device is the cpufreq cooling device. As we want to add a new CPU cooling device, let's convert the CPU cooling to a choice giving a list of CPU cooling devices. At this point, there is obviously only one CPU cooling device. There is no functional changes. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20191204153930.9128-1-daniel.lezcano@linaro.org
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- 07 Nov, 2019 1 commit
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Guillaume La Roque authored
Amlogic G12A and G12B SoCs integrate two thermal sensors with the same design. One is located close to the DDR controller and the other one is located close to the PLLs (between the CPU and GPU). The calibration data for each of the thermal sensors instance is stored in a different location within the AO region. Implement reading the temperature from each thermal sensor. The IP block has more functionality, which may be added to this driver in the future: - chip reset when the temperature exceeds a configurable threshold - up to four interrupts when the temperature has risen above a configurable threshold - up to four interrupts when the temperature has fallen below a configurable threshold Tested-by:
Christian Hewitt <christianshewitt@gmail.com> Tested-by:
Kevin Hilman <khilman@baylibre.com> Reviewed-by:
Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by:
Guillaume La Roque <glaroque@baylibre.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191004090114.30694-3-glaroque@baylibre.com
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- 14 May, 2019 1 commit
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Talel Shenhar authored
This is a generic thermal driver for simple MMIO sensors, of which amazon,al-thermal is one. This device uses a single MMIO transaction to read the temperature and report it to the thermal subsystem. Signed-off-by:
Talel Shenhar <talel@amazon.com> Reviewed-by:
David Woodhouse <dwmw@amazon.co.uk> Reviewed-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 07 Dec, 2018 2 commits
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Amit Kucheria authored
This cleans up the directory a bit allowing just one place to look for thermal related drivers for QCOM platforms instead of being scattered in the root directory and the qcom/ subdirectory. Compile-tested with ARCH=arm64 defconfig and the driver explicitly enabled with menuconfig. Signed-off-by:
Amit Kucheria <amit.kucheria@linaro.org> Acked-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Amit Kucheria authored
This cleans up the directory a bit, now that we have several other platforms using platform-specific sub-directories. Compile-tested with ARCH=x86 defconfig and the drivers explicitly enabled with menuconfig. Signed-off-by:
Amit Kucheria <amit.kucheria@linaro.org> Acked-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 25 Oct, 2018 1 commit
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David HERNANDEZ SANCHEZ authored
Add support for DTS thermal sensor that can be found on some STM32 platforms. This driver is based on OF and works in interrupt mode. It offers two temperature trip points: passive and critical. The first is intended for passive cooling notification while the second is used for over-temperature reset. Signed-off-by:
David Hernandez Sanchez <david.hernandezsanchez@st.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 02 Nov, 2017 1 commit
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Greg Kroah-Hartman authored
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by:
Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by:
Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 19 Oct, 2017 1 commit
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Mikko Perttunen authored
On Tegra186, the BPMP (Boot and Power Management Processor) exposes an interface to thermal sensors on the system-on-chip. This driver implements access to the interface. It supports reading the temperature, setting trip points and receiving notification of a tripped trip point. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Acked-by:
Zhang Rui <rui.zhang@intel.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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- 11 Aug, 2017 1 commit
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Kunihiko Hayashi authored
Add a thermal driver for on-chip PVT (Process, Voltage and Temperature) monitoring unit implemented on UniPhier SoCs. This driver supports temperature monitoring and alert function. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 23 Apr, 2017 1 commit
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Rafał Miłecki authored
We already have 2 Broadcom drivers and at least 1 more is coming. This made us create broadcom subdirectory where bcm2835 should be moves now. Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 07 Apr, 2017 2 commits
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Steve Twiss authored
Add junction temperature monitoring supervisor device driver, compatible with the DA9062 and DA9061 PMICs. A MODULE_DEVICE_TABLE() macro is added. If the PMIC's internal junction temperature rises above T_WARN (125 degC) an interrupt is issued. This T_WARN level is defined as the THERMAL_TRIP_HOT trip-wire inside the device driver. The thermal triggering mechanism is interrupt based and happens when the temperature rises above a given threshold level. The component cannot return an exact temperature, it only has knowledge if the temperature is above or below a given threshold value. A status bit must be polled to detect when the temperature falls below that threshold level again. A kernel work queue is configured to repeatedly poll and detect when the temperature falls below this trip-wire, between 1 and 10 second intervals (defaulting at 3 seconds). This scheme is provided as an example. It would be expected that any final implementation will also include a notify() function and any of these settings could be altered to match the application where appropriate. When over-temperature is reached, the interrupt from the DA9061/2 will be repeatedly triggered. The IRQ is therefore disabled when the first over-temperature event happens and the status bit is polled using a work-queue until it becomes false. This strategy is designed to allow the periodic transmission of uevents (HOT trip point) as the first level of temperature supervision method. It is intended for non-invasive temperature control, where the necessary measures for cooling the system down are left to the host software. Once the temperature falls again, the IRQ is re-enabled so a new critical over-temperature event can be detected. Reviewed-by:
Lukasz Luba <lukasz.luba@arm.com> Signed-off-by:
Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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Rafał Miłecki authored
Northstar is a SoC family commonly used in home routers. This commit adds a driver for checking CPU temperature. As Northstar Plus seems to also have this IP block this new symbol gets ARCH_BCM_IPROC dependency. Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 01 Apr, 2017 1 commit
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Stefan Wahren authored
Add basic thermal driver for bcm2835 SoC. This driver currently make sure that tsense HW block is set up correctly. Tested-by:
Rafał Miłecki <rafal@milecki.pl> Signed-off-by:
Martin Sperl <kernel@martin.sperl.org> Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Acked-by:
Eric Anholt <eric@anholt.net> Acked-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 15 Mar, 2017 1 commit
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Viresh Kumar authored
The best place to register the CPU cooling device is from the cpufreq driver as we would know if all the resources are already available or not. That's what is done for the cpufreq-dt.c driver as well. The cpu-cooling driver for dbx500 platform was just (un)registering with the thermal framework and that can be handled easily by the cpufreq driver as well and in proper sequence as well. Get rid of the cooling driver and its its users and manage everything from the cpufreq driver instead. Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org> Tested-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 19 Feb, 2017 1 commit
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Baoyou Xie authored
This patch adds thermal driver for ZTE's zx2967 family. Signed-off-by:
Baoyou Xie <baoyou.xie@linaro.org> Reviewed-by:
Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 20 Jan, 2017 1 commit
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Wolfram Sang authored
Add support for R-Car Gen3 thermal sensors. Polling only for now, interrupts will be added incrementally. Same goes for reading fuses. This is documented already, but no hardware available for now. Signed-off-by:
Hien Dang <hien.dang.eb@renesas.com> Signed-off-by:
Thao Nguyen <thao.nguyen.yb@rvc.renesas.com> Signed-off-by:
Khiem Nguyen <khiem.nguyen.xt@renesas.com> Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> [Niklas: document and rework temperature calculation] Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 23 Nov, 2016 2 commits
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Eduardo Valentin authored
Here we have a simple code organization. This patch moves functions that do not need to handle thermal core internal data structure to thermal_helpers.c file. Cc: Zhang Rui <rui.zhang@intel.com> Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Eduardo Valentin authored
This is a code reorganization, simply to concentrate the code handling sysfs in a specific file: thermal_sysfs.c. Right now, moving only the sysfs entries of thermal_zone_device. Cc: Zhang Rui <rui.zhang@intel.com> Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 27 Sep, 2016 3 commits
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Laxman Dewangan authored
Maxim Semiconductor Max77620 supports alarm interrupts when its die temperature crosses 120C and 140C. These threshold temperatures are not configurable. Add thermal driver to register PMIC die temperature as thermal zone sensor and capture the die temperature warning interrupts to notifying the client. Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Jia Hongtao authored
This driver add thermal management support by enabling TMU (Thermal Monitoring Unit) on QorIQ platform. It's based on thermal of framework: - Trip points defined in device tree. - Cpufreq as cooling device registered in qoriq cpufreq driver. Signed-off-by:
Jia Hongtao <hongtao.jia@nxp.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Rajendra Nayak authored
TSENS is Qualcomms' thermal temperature sensor device. It supports reading temperatures from multiple thermal sensors present on various QCOM SoCs. Calibration data is generally read from a non-volatile memory (eeprom) device. Add a skeleton driver with all the necessary abstractions so a variety of qcom device families which support TSENS can add driver extensions. Also add the required device tree bindings which can be used to describe the TSENS device in DT. Signed-off-by:
Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by:
Lina Iyer <lina.iyer@linaro.org> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 05 Sep, 2016 1 commit
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Bin Gao authored
This change adds support for Intel BXT Whiskey Cove PMIC thermal driver which is intended to handle the alert interrupts triggered upon thermal trip point cross and notify the thermal framework appropriately with the zone, temp, crossed trip and event details. Signed-off-by:
Yegnesh S Iyer <yegnesh.s.iyer@intel.com> Signed-off-by:
Bin Gao <bin.gao@intel.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 17 May, 2016 3 commits
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Laxman Dewangan authored
In some of platform, thermal sensors like NCT thermistors are connected to the one of ADC channel. The temperature is read by reading the voltage across the sensor resistance via ADC. Lookup table for ADC read value to temperature is referred to get temperature. ADC is read via IIO framework. Add support for thermal sensor driver which read the voltage across sensor resistance from ADC through IIO framework. Acked-by:
Jonathan Cameron <jic23@kernel.org> Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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Marc Gonzalez authored
The Tango thermal driver provides support for the primitive temperature sensor embedded in Tango chips since the SMP8758. This sensor only generates a 1-bit signal to indicate whether the die temperature exceeds a programmable threshold. Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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Wei Ni authored
Move Tegra soctherm driver to tegra directory, it's easy to maintain and add more new function support for Tegra platforms. This will also help to split soctherm driver into common parts and chip specific data related parts. Signed-off-by:
Wei Ni <wni@nvidia.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 18 Feb, 2016 1 commit
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Sascha Hauer authored
This adds support for the Mediatek thermal controller found on MT8173 and likely other SoCs. The controller is a bit special. It does not have its own ADC, instead it controls the on-SoC AUXADC via AHB bus accesses. For this reason we need the physical address of the AUXADC. Also it controls a mux using AHB bus accesses, so we need the APMIXEDSYS physical address aswell. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 30 Oct, 2015 1 commit
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Ørjan Eide authored
Add a generic thermal cooling device for devfreq, that is similar to cpu_cooling. The device must use devfreq. In order to use the power extension of the cooling device, it must have registered its OPPs using the OPP library. Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Javi Merino <javi.merino@arm.com> Signed-off-by:
Ørjan Eide <orjan.eide@arm.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 04 Aug, 2015 1 commit
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Tushar Dave authored
This change adds a thermal driver for Wildcat Point platform controller hub. This driver register PCH thermal sensor as a thermal zone and associate critical and hot trips if present. Signed-off-by:
Tushar Dave <tushar.n.dave@intel.com> Reviewed-by:
Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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- 03 Jun, 2015 1 commit
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kongxinwei authored
This patch adds the support for hisilicon thermal sensor, within hisilicon SoC. there will register sensors for thermal framework and use device tree to bind cooling device. Signed-off-by:
Leo Yan <leo.yan@linaro.org> Signed-off-by:
kongxinwei <kong.kongxinwei@hisilicon.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 05 May, 2015 2 commits
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Javi Merino authored
The power allocator governor is a thermal governor that controls system and device power allocation to control temperature. Conceptually, the implementation divides the sustainable power of a thermal zone among all the heat sources in that zone. This governor relies on "power actors", entities that represent heat sources. They can report current and maximum power consumption and can set a given maximum power consumption, usually via a cooling device. The governor uses a Proportional Integral Derivative (PID) controller driven by the temperature of the thermal zone. The output of the controller is a power budget that is then allocated to each power actor that can have bearing on the temperature we are trying to control. It decides how much power to give each cooling device based on the performance they are requesting. The PID controller ensures that the total power budget does not exceed the control temperature. Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Punit Agrawal <punit.agrawal@arm.com> Signed-off-by:
Javi Merino <javi.merino@arm.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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Ivan T. Ivanov authored
Add support for the temperature alarm peripheral found inside Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm peripheral outputs a pulse on an interrupt line whenever the thermal over temperature stage value changes. Register a thermal sensor. The temperature reported by this thermal sensor device should reflect the actual PMIC die temperature if an ADC is present on the given PMIC. If no ADC is present, then the reported temperature should be estimated from the over temperature stage value. Cc: David Collins <collinsd@codeaurora.org> Signed-off-by:
Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 01 May, 2015 2 commits
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Ong, Boon Leong authored
In Intel Quark SoC X1000, there is one on-die digital temperature sensor(DTS). The DTS offers both hot & critical trip points. However, in current distribution of UEFI BIOS for Quark platform, only critical trip point is configured to be 105 degree Celsius (based on Quark SW ver1.0.1 and hot trip point is not used due to lack of IRQ. There is no active cooling device for Quark SoC, so Quark SoC thermal management logic expects Linux distro to orderly power-off when temperature of the DTS exceeds the configured critical trip point. Kernel param "polling_delay" in milliseconds is used to control the frequency the DTS temperature is read by thermal framework. It defaults to 2-second. To change it, use kernel boot param "intel_quark_dts_thermal.polling_delay=X". User interacts with Quark SoC DTS thermal driver through sysfs via: /sys/class/thermal/thermal_zone0/ For example: - to read DTS temperature $ cat temp - to read critical trip point $ cat trip_point_0_temp - to read trip point type $ cat trip_point_0_type - to emulate temperature raise to test orderly shutdown by Linux distro $ echo 105 > emul_temp Tested-by:
Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by:
Ong Boon Leong <boon.leong.ong@intel.com> Reviewed-by:
Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by:
Kweh, Hock Leong <hock.leong.kweh@intel.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Srinivas Pandruvada authored
This is becoming a common feature for Intel SoCs to expose the additional digital temperature sensors (DTSs) using side band interface (IOSF). This change remove common IOSF DTS handler function from the existing driver intel_soc_dts_thermal.c and creates a stand alone module, which can be selected from the SoC specific drivers. In this way there is less code duplication. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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- 24 Nov, 2014 1 commit
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Caesar Wang authored
Thermal is TS-ADC Controller module supports user-defined mode and automatic mode. User-defined mode refers,TSADC all the control signals entirely by software writing to register for direct control. Automaic mode refers to the module automatically poll TSADC output, and the results were checked.If you find that the temperature High in a period of time,an interrupt is generated to the processor down-measures taken;If the temperature over a period of time High, the resulting TSHUT gave CRU module,let it reset the entire chip, or via GPIO give PMIC. Signed-off-by:
zhaoyifeng <zyf@rock-chips.com> Signed-off-by:
Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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- 20 Nov, 2014 2 commits
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Mikko Perttunen authored
This adds support for the Tegra SOCTHERM thermal sensing and management system found in the Tegra124 system-on-chip. This initial driver supports temperature polling for four thermal zones. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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Eduardo Valentin authored
This patch introduces a new thermal cooling device based on common clock framework. The original motivation to write this cooling device is to be able to cool down thermal zones using clocks that feed co-processors, such as GPUs, DSPs, Image Processing Co-processors, etc. But it is written in a way that it can be used on top of any clock. The implementation is pretty straight forward. The code creates a thermal cooling device based on a pair of a struct device and a clock name. The struct device is assumed to be usable by the OPP layer. The OPP layer is used as source of the list of possible frequencies. The (cpufreq) frequency table is then used as a map from frequencies to cooling states. Cooling states are indexes to the frequency table. The logic sits on top of common clock framework, specifically on clock pre notifications. Any PRE_RATE_CHANGE is hijacked, and the transition is only allowed when the new rate is within the thermal limit (cooling state -> freq). When a thermal cooling device state transition is requested, the clock is also checked to verify if the current clock rate is within the new thermal limit. Cc: Zhang Rui <rui.zhang@intel.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Nishanth Menon <nm@ti.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Len Brown <len.brown@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-pm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by:
Eduardo Valentin <edubezval@gmail.com>
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