- 26 Oct, 2011 32 commits
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Stephen Warren authored
The previous patch which implemented a DT binding for sdhci-tegra did not allow all platform data fields to be initialized from DT. The following were missing: is_8bit: Implemented by this patch. pm_flags: Not implemented yet. There are no mainline users of this field. I'm not quite sure what it's for, and hence how to represent this in DT; the value ends up being assigned to host->mmc->pm_caps. While we're at it, fix the binding documentation to refer to "SD/MMC" instead of "eSDHC", since that's the correct name; "eSDHC" was cut/paste from the Freescale binding docs. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Chris Ball <cjb@laptop.org>
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Shashidhar Hiremath authored
The Patch adds the support for SDIO interrupts for all slots. It includes enabling of SDIO interrupts through dw_mci_enable_sdio_irq and the handling of the slot specific interrupts in the Interrupt Service Routine. Signed-off-by:
Shashidhar Hiremath <shashidharh@vayavyalabs.com> Acked-by:
James Hogan <james.hogan@imgtec.com> Signed-off-by:
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Subhash Jadavani authored
If DMA resource is not available then SDCC driver should atleast work in PIO data transfer mode. Signed-off-by:
Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by:
Sahitya Tummala <stummala@codeaurora.org> Signed-off-by:
David Brown <davidb@codeaurora.org> Signed-off-by:
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Sahitya Tummala authored
Intialize busclk_timer before it is accessed in probe. Signed-off-by:
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Sahitya Tummala authored
Not all targets have IRQ1 line routed from the SD controller to the processor. So we cannot rely on IRQ1 for PIO interrupts. This patch moves all PIO interrupts to IRQ0 and enables the PIO mode. Signed-off-by:
Murali Palnati <palnatim@codeaurora.org> Signed-off-by:
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Sahitya Tummala authored
On some targets, MCI_IRQ_MASK1 is not routed to the MSM in which case only "cmd_irq" must be used even for PIO. With this change, all the targets will use only "cmd_irq" for both CMD and PIO. Signed-off-by:
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Sahitya Tummala authored
For clocks that support rates which can be set (most clocks other than _pclk AHB clocks), a rate must be set using clk_set_rate() before the clock is enabled for the first time with clk_enable(). Subsequent calls to clk_enable() need not be preceded with the clk_set_rate() calls unless we wish to change the clock rate that is set previously. SDC host->clk is currently enabled without setting the clock rate even once. This patch fixes this, by ensuring that the clock rate for this clock is first set before enabling the clock. Signed-off-by:
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Sahitya Tummala authored
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Alexander Tarasikov authored
This allows boards with non-standard sdio cards to fill the CIS/CCCR data. It is particularly important for old msm72k boards using wl1251. Also drop the obsolete embedded_sdio_data structure from the header as it was intended to surve a similiar purpose but was not implemented. Signed-off-by:
Alexander Tarasikov <alexander.tarasikov@gmail.com> Acked-by:
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Alexander Tarasikov authored
The use of && instead of || caused a NULL pointer dereference if gpio setup was not passed via platform data Signed-off-by:
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Simon Horman authored
This allows specific (non-multiplexed) IRQ handlers to be used. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Acked-by:
Magnus Damm <magnus.damm@gmail.com> Signed-off-by:
Simon Horman <horms@verge.net.au> Signed-off-by:
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Simon Horman authored
Allow named IRQs to use corresponding specific handlers. If named IRQs are used, at least an "sdcard" IRQ has to be specified by the platform. If names are not used, an arbitrary number of IRQs can be provided by the platform, in which case the generic ISR will be used for each of them. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
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Simon Horman authored
Provide separate interrupt handlers which may be used by platforms where SDHI has three interrupt sources. This patch also removes the commented-out handling of CRC and other errors. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by:
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Simon Horman authored
This avoids the need to look up the masks each time an interrupt is handled. As suggested by Guennadi. Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by:
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Venkatraman S authored
Fix the sparse warning output "warning: Using plain integer as NULL pointer" Signed-off-by:
Venkatraman S <svenkatr@ti.com> Signed-off-by:
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Venkatraman S authored
Fix the sparse warning "drivers/mmc/card/queue.c:111:20: warning: symbol 'mmc_alloc_sg' was not declared. Should it be static?" Signed-off-by:
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Sascha Hauer authored
The individual SoC dependency in Kconfig hardly scales anymore. Instead of having such a fine grained dependency just depend on ARCH_MXC and risk that the uninformed user has to look in the help text to figure out which driver is the correct one. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
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Grant Likely authored
Add hooks to read gpio configuration out of the device tree node. [grant.likely: Rewrite of original patch from John Bonesio] Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> [swarren: Fixed tegra_sdhci_get_ro() to retrieve pdata correctly] [swarren: Reworked to avoid #ifdef CONFIG_OF] [swarren: Reworked binding based on fsl-imx-esdhc.txt] [swarren: Documented binding] Signed-off-by:
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Daniel Drake authored
Now that we have improved the runtime power management powerup/powerdown code, we believe that MMC_CAP_POWER_OFF_CARD is no longer necessary: runtime PM should now work everywhere. The only hard evidence for introducing MMC_CAP_POWER_OFF_CARD was the Marvell sd8686 wifi chip, which was believed to require external gpio manipulation which wasn't supported by some boards. After further investigation it was realized (and confirmed by Marvell folks) that sd8686 requirements can be fulfilled by changing the reset sequence itself, even if no external gpio is manipulated. For further information, see the following thread: http://www.mail-archive.com/linux-mmc@vger.kernel.org/msg04289.html Enable this trivially for a release or two. If no problems are reported, we will follow up with a more extensive patch to remove this flag altogether. If problems are reported, we can look at whitelist/blacklist possibilities as before. Signed-off-by:
Daniel Drake <dsd@laptop.org> Acked-by:
Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by:
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Per Forlin authored
Add description on how to enable random fault injection for MMC IO. Signed-off-by:
Per Forlin <per.forlin@linaro.org> Acked-by:
Akinobu Mita <akinobu.mita@gmail.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Per Forlin authored
This adds support to inject data errors after a completed host transfer. The mmc core will return error even though the host transfer is successful. This simple fault injection proved to be very useful to test the non-blocking error handling in the mmc_blk_issue_rw_rq(). Random faults can also test how the host driver handles pre_req() and post_req() in case of errors. Signed-off-by:
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Per Forlin authored
Export symbols should_fail() and fault_create_debugfs_attr() in order to let modules utilize the fault injection framework. Signed-off-by:
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Richard Zhu authored
Eanble the ADMA2 mode for freescale esdhc imx driver, tested on MX25 3DS board, MX51 BBG board and MX53 LOCO board. This patch is only used to enable the ADMA2 for MX51/53 platforms. MX25/35 can't support the ADMA2 mode, set BROKEN_ADMA quirk on MX25/35 platforms. The ADMA mode supported or not can be distinguished by bit 20 of the Capability Register (offset 0x40) in the FSL eSDHC module. Signed-off-by:
Richard Zhu <richard.zhu@linaro.org> Tested-and-acked-by:
Eric Miao <eric.miao@linaro.org> Signed-off-by:
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Nicolas Ferre authored
Remove the use of irq_to_gpio() in the card detection interrupt handler. The information is available in the board structure and we can avoid using a function that has little meaning. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by:
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Ludovic Desroches authored
This patch fixes a potential issue about PDC interrupts. For example we have a ENDRX pending interrupt and a RXBUFF pending interrupt. We have received the RXBUFF interrupt but the transfer is not finished (so we didn't have time to give a new buffer to the PDC controller). Then we will compute ENDRX interrupt and we will give a new buffer to the PDC controller, just after we will compute the RXBUFF interrupt and give one or two new buffers to the PDC controller but we are not sure that the first buffer given has been filled. So in this situation we may have "lost" one sg buffer. It's the same for transmission. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by:
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Ludovic Desroches authored
Assuming that a sg buffer size is a page size is false so use sg_dma_len. A 4096 bytes can be required with two 2048-bytes sg buffer. Signed-off-by:
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Ludovic Desroches authored
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Ludovic Desroches authored
Rename atmci_start_command() to atmci_send_command() which is more appropriate; atmci_start_command suggests we're sending a start command. Signed-off-by:
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Ludovic Desroches authored
Add pdc support for atmel-mci. It makes at91-mci driver useless because it was only used for the old atmel MCI core which has pdc but no dma support. To allow removing at91-mci, the capabilities of the MCI core are detected at runtime -- then the driver will use pio, pdc or dma transfers. Warning: at91rm9200 is not supported, to support it we need to use swab32 on data but I have no board to test it. Signed-off-by:
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Ludovic Desroches authored
Signed-off-by:
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Ludovic Desroches authored
Change atmci_readl and atmci_writel macros: remove string concatenation. We can use these macros with registers which are not prefixed by ATMCI_. This is the case if we want to write PDC registers which are common to several devices so they are not prefixed with ATMCI_. Signed-off-by:
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Ludovic Desroches authored
Homogenize namespace to atmci. Signed-off-by:
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- 17 Oct, 2011 1 commit
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- 16 Oct, 2011 5 commits
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Michał Mirosław authored
Private rx_csum flags are now duplicate of netdev->features & NETIF_F_RXCSUM. Removing this needs deeper surgery. Things noticed: - HW VLAN acceleration probably can be toggled, but it's left as is - the resets on RX csum offload change can probably be avoided - there is A LOT of copy-and-pasted code here Signed-off-by:
Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Jacob Keller authored
When enabling hardware timestamping for ptp v2 event packets, the software does not setup the queue for l4 packets, although layer 4 packets are valid for v2. This patch adds the flag which enables setting up a queue and enabling udp packet timestamping. Signed-off-by:
Jacob E Keller <jacob.e.keller@intel.com> Tested-by:
Aaron Brown <aaron.f.brown@intel.com> Signed-off-by:
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Greg Rose authored
Implements the new netdev op to allow user configuration of spoof checking on a per VF basis. V2 - Change netdev spoof check op setting to bool Signed-off-by:
Greg Rose <gregory.v.rose@intel.com> Signed-off-by:
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Greg Rose authored
Add configuration setting for drivers to turn spoof checking on or off for discrete VFs. v2 - Fix indentation problem, wrap the ifla_vf_info structure in #ifdef __KERNEL__ to prevent user space from accessing and change function paramater for the spoof check setting netdev op from u8 to bool. v3 - Preset spoof check setting to -1 so that user space tools such as ip can detect that the driver didn't report a spoofcheck setting. Prevents incorrect display of spoof check settings for drivers that don't report it. Signed-off-by: -
Bruce Allan authored
Commit 67fd4fcb (e1000e: convert to stats64) added the ability to update statistics more accurately and on-demand through the net_device_ops .ndo_get_stats64 hook, but introduced a locking bug on 82577/8/9 when linked at half-duplex (seen on kernels with CONFIG_DEBUG_ATOMIC_SLEEP=y and CONFIG_PROVE_LOCKING=y). The commit introduced code paths that caused a mutex to be locked in atomic contexts, e.g. an rcu_read_lock is held when irqbalance reads the stats from /sys/class/net/ethX/statistics causing the mutex to be locked to read the Phy half-duplex statistics registers. The mutex was originally introduced to prevent concurrent accesses of resources (the NVM and Phy) shared by the driver, firmware and hardware a few years back when there was an issue with the NVM getting corrupted. It was later split into two mutexes - one for the NVM and one for the Phy when it was determined the NVM, unlike the Phy, should not be protected by the software/firmware/hardware semaphore (arbitration of which is done in part with the SWFLAG bit in the EXTCNF_CTRL register). This latter semaphore should be sufficient to prevent resource contention of the Phy in the driver (i.e. the mutex for Phy accesses is not needed), but to be sure the mutex is replaced with an atomic bit flag which will warn if any contention is possible. Also add additional debug output to help determine when the sw/fw/hw semaphore is owned by the firmware or hardware. Signed-off-by:
Bruce Allan <bruce.w.allan@intel.com> Reported-by:
Francois Romieu <romieu@fr.zoreil.com> Tested-by:
Jeff Pieper <jeffrey.e.pieper@intel.com>
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- 14 Oct, 2011 2 commits
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Daniel Drake authored
The recent changes to only power the device when the interface up introduced a bug: changing interface type, legal when the interface is down, performs device I/O. Fix this functionality by validating and recording the interface type when the change is requested, but only applying the change if/when the interface is brought up. Signed-off-by:
Dan Williams <dcbw@redhat.com> Signed-off-by:
John W. Linville <linville@tuxdriver.com>
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Helmut Schaa authored
Only station flags that are already defined in nl80211 are added for now. Signed-off-by:
Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by:
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