- 18 Nov, 2008 28 commits
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Mike Frysinger authored
Do not make BFIN_DMA_5XX optional since a large portion of our code relies on dma functions existing Signed-off-by:
Mike Frysinger <vapier.adi@gmail.com> Signed-off-by:
Bryan Wu <cooloney@kernel.org>
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Mike Frysinger authored
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Michael Hennerich authored
to reproduce: $ make BF537-STAMP_defconfig $ make menuconfig CPU Frequency scaling ---> [*] CPU Frequency scaling <M> CPU frequency translation statistics $ make arch/blackfin/mach-common/built-in.o: In function `bfin_target': arch/blackfin/mach-common/cpufreq.c:(.text+0xf1e): undefined reference to `cpufreq_frequency_table_target' arch/blackfin/mach-common/built-in.o: In function `bfin_verify_speed': arch/blackfin/mach-common/cpufreq.c:(.text+0x1056): undefined reference to `cpufreq_frequency_table_verify' arch/blackfin/mach-common/built-in.o: In function `__bfin_cpu_init': arch/blackfin/mach-common/cpufreq.c:(.init.text+0x554): undefined reference to `cpufreq_frequency_table_get_attr' arch/blackfin/mach-common/cpufreq.c:(.init.text+0x56a): undefined reference to `cpufreq_frequency_table_cpuinfo' arch/blackfin/mach-common/built-in.o: In function `sys_call_table': (.data+0x83c): undefined reference to `cpufreq_freq_attr_scaling_available_freqs' make: *** [.tmp_vmlinux1] Error 1 Blackfin wants CPU_FREQ_TABLE Signed-off-by:Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Mike Frysinger authored
rename cache_lock() to bfin_cache_lock() to avoid namespace collision with common code Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
- make the code a bit more readable - kill of warnings/ifdef mess a bit Signed-off-by:
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Mike Frysinger authored
arch/blackfin/mach-common/entry.S:465: Error: pcrel too far BFD_RELOC_BFIN_10 Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
rename irq_flags to bfin_irq_flags to avoid namespace collision with common code Signed-off-by:
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Mike Frysinger authored
move irq related functions into asm/irq.h and out of the mondo asm/system.h Signed-off-by:
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Mike Frysinger authored
Move the PORT registers down as well since they may utilize asm/system.h code Signed-off-by:
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Mike Frysinger authored
create an IN_MEM() macro to simplify comparing an address in an on-chip region of memory and make things readable Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
Delay PLL_CTL/VR_CTL wrappers as much as possible to avoid the inter-dependency problems with cdef and common headers Signed-off-by:
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
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Mike Frysinger authored
overlay thread.usp over PT_USP when getting the whole regfile to match PT_USP behavior Signed-off-by:
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Mike Frysinger authored
rewrite blackfin_invalidate_entire_dcache() in C for easier management, better optimization, and so we take all SSYNC anomalies into account Signed-off-by:
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Mike Frysinger authored
Cc: Graf Yang <graf.yang@analog.com> Signed-off-by:
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Sonic Zhang authored
Hardware breakpoint doesn't always work in kgdb. It works at the first two times, but if you repeatedly trigger that hardware breakpoint, it would slip over that point once in two times. Fix it by always setting hw bp skip to 0. gdb does skip after hw bp trap. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
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Mike Frysinger authored
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Bryan Wu authored
Blackfin arch: Use GPIO_BANKSIZE macro to replace const number 16 for GPIO_BANK_NUM macro caculating Signed-off-by:
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- 07 Jan, 2009 1 commit
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to some other misc code Singed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
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- 18 Nov, 2008 2 commits
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin kernel and memory management code Singed-off-by:
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin CPLB related code Signed-off-by:
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- 07 Jan, 2009 2 commits
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by:
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Graf Yang authored
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to BF561 kernel code Signed-off-by:
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- 18 Nov, 2008 7 commits
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Mike Frysinger authored
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Michael Hennerich authored
- This patch adds support for ARCH_WANT_OPTIONAL_GPIOLIB. - It may be changed in future to ARCH_REQUIRE_GPIOLIB. - Change GPIO_BANK_NUM use DIV_ROUND_UP( , ) macro Signed-off-by:
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Michael Hennerich authored
- Remove SSYNC() - Use irq_to_gpio where applicable - Remove gpio_edge_triggered bitfield, check irq_desc fields instead. - Remove gpio_both_edge_triggeredb bitfield, check irq_desc fields instead. - Use BITMAP and bitops on gpio_enabled - Preferably use 32-bit - Looking at the disassembly this indeed saves quite a few instructions. Signed-off-by:
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Yi Li authored
Disable spi_mmc DMA by default. Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Mike Frysinger authored
- remove SSYNC() left over from irq init split - do not force SSYNC() when masking/unmasking IRQs in the SIC as any order enforced by the hardware should already be enforced by software Signed-off-by:
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Bryan Wu authored
Blackfin arch: fix bug - gpio_bank() macros messed up bank number caculating with positioning a gpio The whole story: Before BF51x merged, all the MAX_BLACKFIN_GPIOS are integral multiple of GPIO_BANKSIZE (= 16). But BF51x provides MAX_BLACKFIN_GPIOS = 40 which includes 3 banks and the 3rd bank has only 8 GPIO pins. Therefore, gpio_bank() macros is correct when you try to find a GPIO in which bank (GPIO_35 is in bank 2). But on BF51x gpio_bank(MAX_BLACKFIN_GPIOS) only gives out 2 banks instead of 3 banks for some static array initialization. This patch add a new macros gpio_bank_n() and GPIO_BANK_NUM to do bank number caculating and remain the gpio_bank() macros for positioning a gpio in which bank. Signed-off-by: -
Mike Frysinger authored
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