- 29 Jan, 2018 2 commits
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git://git.infradead.org/linux-mtdBoris Brezillon authored
Pull NAND changes from Boris Brezillon: " Core changes: * Fix NAND_CMD_NONE handling in nand_command[_lp]() hooks * Introduce the ->exec_op() infrastructure * Rework NAND buffers handling * Fix ECC requirements for K9F4G08U0D * Fix nand_do_read_oob() to return the number of bitflips * Mark K9F1G08U0E as not supporting subpage writes Driver changes: * MTK: Rework the driver to support new IP versions * OMAP OneNAND: Full rework to use new APIs (libgpio, dmaengine) and fix DT support * Marvell: Add a new driver to replace the pxa3xx one " -
git://git.infradead.org/linux-mtdBoris Brezillon authored
Pull spi-nor changes from Cyrille Pitchen: " This pull-request contains the following notable changes: Core changes: * Add support to new ISSI and Cypress/Spansion memory parts. * Fix support of Micron memories by checking error bits in the FSR. * Fix update of block-protection bits by reading back the SR. * Restore the internal state of the SPI flash memory when removing the device. Driver changes: * Maintenance for Freescale, Intel and Metiatek drivers. * Add support of the direct access mode for the Cadence QSPI controller. "
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- 25 Jan, 2018 2 commits
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Miquel Raynal authored
When the requested ECC strength does not exactly match the strengths supported by the ECC engine, the driver is selecting the closest strength meeting the 'selected_strength > requested_strength' constraint. Fix the fact that, in this particular case, ecc->strength value was not updated to match the 'selected_strength'. For instance, one can encounter this issue when no ECC requirement is filled in the device tree while the NAND chip minimum requirement is not a strength/step_size combo natively supported by the ECC engine. Fixes: 1fef62c1 ("mtd: nand: add sunxi NAND flash controller support") Cc: <stable@vger.kernel.org> Suggested-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by:
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Boris Brezillon authored
Commit 25f815f6 ("mtd: nand: force drivers to explicitly send READ/PROG commands") added a call to nand_read_page_op() in gpmi_ecc_read_page(), which means this function now sends a READ0 command and place the data pointer at the beginning of the page. This logic is breaking gpmi_ecc_read_subpage() which was calling gpmi_ecc_read_page() and expected it to only retrieve the data without sending the READ0 command. Create a gpmi_ecc_read_page_data() helper which only does the data retrieval and ECC correction steps and implement gpmi_ecc_read_page() as a wrapper that calls nand_read_page_op()+gpmi_ecc_read_page_data(). This way, gpmi_ecc_read_subpage() can call gpmi_ecc_read_page_data() which restores the logic we had before commit 25f815f6 ("mtd: nand: force drivers to explicitly send READ/PROG commands"). Fixes: 25f815f6 ("mtd: nand: force drivers to explicitly send READ/PROG commands") Signed-off-by:
Han Xu <han.xu@nxp.com>
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- 20 Jan, 2018 2 commits
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Miquel Raynal authored
GCC-4.4.4 raises errors when assigning a parameter in an anonymous union, leading to this kind of failure: drivers/mtd/nand/marvell_nand.c:1936: warning: missing braces around initializer warning: (near initialization for '(anonymous)[1].<anonymous>') error: unknown field 'data' specified in initializer error: unknown field 'addr' specified in initializer Work around the situation by naming these unions. Fixes: 8878b126 ("mtd: nand: add ->exec_op() implementation") Reported-by:Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Miquel Raynal authored
The function marvell_nfc_init_dma() allocates a DMA buffer without the GFP_KERNEL modifier, that triggers this warning: "marvell_nfc_init_dma() error: no modifiers for allocation." Fix this by using (GFP_KERNEL | GFP_DMA) instead of only GFP_DMA as the probe happens in non-interrupt context. Fixes: 02f26ecf ("mtd: nand: add reworked Marvell NAND controller driver") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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- 19 Jan, 2018 3 commits
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Colin Ian King authored
Variable oob_len is assigned and never read, hence it is redundant and can be removed. Cleans up clang warnings: drivers/mtd/nand/marvell_nand.c:1356:6: warning: Value stored to 'oob_len' during its initialization is never read drivers/mtd/nand/marvell_nand.c:1369:4: warning: Value stored to 'oob_len' is never read Signed-off-by:
Colin Ian King <colin.king@canonical.com> Acked-by:
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Colin Ian King authored
Trivial fix to spelling mistakes in dev_err error message text. Signed-off-by:
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Wei Yongjun authored
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by:
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- 16 Jan, 2018 4 commits
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Boris Brezillon authored
Some of the check done in custom ->_read/write_oob() implementation are already done by the core (in mtd_check_oob_ops()). Suggested-by:
Peter Pan <peterpansjtu@gmail.com> [Remove redundant checks done in mtdpart.c] Signed-off-by:
Ladislav Michl <ladis@linux-mips.org>
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Boris Brezillon authored
Some MTD sublayers/drivers are implementing ->_read/write_oob() and provide dummy wrappers for their ->_read/write() implementations. Let the core handle this case instead of duplicating the logic. Signed-off-by:
Robert Jarzmik <robert.jarzmik@free.fr> Acked-by:
Brian Norris <computersforpeace@gmail.com> Reviewed-by:
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Boris Brezillon authored
part_read() and part_read_oob() were counting ECC failures and bitflips differently. Adjust part_read_oob() to mimic what is done in part_read(). This is needed to use ->_read_oob() as a fallback when when ->_read() is not implemented. Note that bitflips and ECC failure accounting on MTD partitions is broken by design, because nothing prevents concurrent accesses to the underlying master MTD device between the moment we save the stats in a local variable and the moment master->_read[_oob]() returns. It's not something that can easily be fixed, so leave it like that for now. Suggested-by:
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Arnd Bergmann authored
The omap2 onenand driver is now available for compile-testing, which uncovers a warning in configurations that have a 64-bit resource_size_t: drivers/mtd/onenand/omap2.c: In function 'omap2_onenand_probe': drivers/mtd/onenand/omap2.c:536:54: error: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'resource_size_t {aka long long unsigned int}' [-Werror=format=] dev_err(dev, "Cannot reserve memory region at 0x%08x, size: 0x%x\n", drivers/mtd/onenand/omap2.c:536:66: error: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t {aka long long unsigned int}' [-Werror=format=] Changing the format string to the special %pR simplifies the code and lets it do the right thing in that configuration, while avoiding the warning. Fixes: a758f50f ("mtd: onenand: omap2: Configure driver from DT") Signed-off-by:Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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- 14 Jan, 2018 3 commits
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Guochun Mao authored
Since more and more Mediatek's SoC can use this driver to control spi-nor flash, functions' name with "mt8173_" is no longer properly. Replacing "mt8173_" with "mtk_" will be more accurate to describe these functions' usable scope. Signed-off-by:
Guochun Mao <guochun.mao@mediatek.com> Signed-off-by:
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Christophe JAILLET authored
'page_buf' and 'oob_buf' are allocated with 'devm_kzalloc()' and should not have __iomem decoration. Remove these decorations and some useless casting. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
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Miquel Raynal authored
Add entry for Marvell NAND controller driver and its bindings which will soon replace the old driver pxa3xx_nand.c. Signed-off-by:
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- 12 Jan, 2018 22 commits
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Ladislav Michl authored
As OneNAND driver is now using devicetree gpmc-onenand and its platform data is unused and can be removed. Signed-off-by:
Roger Quadros <rogerq@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Tested-by:
Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
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Ladislav Michl authored
Move away from platform data configuration and use pure DT approach. Use generic probe function to deal with OneNAND node and remove now useless gpmc_probe_onenand_child function. Import sync mode timing calculation function from mach-omap2/gpmc-onenand.c Signed-off-by:
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Ladislav Michl authored
INT pin (gpio_irq) is not really needed for DMA but only for notification when a command that needs wait has completed. DMA memcpy can be still used even without gpio_irq available, so enable it unconditionally. Signed-off-by:
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Ladislav Michl authored
Second commit in driver history (782b7a36: "[MTD] [OneNAND] OMAP3: add delay for GPIO") added quirk for waiting until GPIO line settle. As DMA was disabled for OMAP2 boards, chances are this problem was not OMAP3 specific and as it is just one register read, previous test for SoC type is approximately as expensive as read itself. Make delay unconditional, which allows removing SoC specific code alltogether. Signed-off-by:
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Peter Ujfalusi authored
Do not use the legacy and deprecated omap-dma interface for setting up the memcpy. Signed-off-by:
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Ladislav Michl authored
Since the very first commit (36cd4fb5: "[MTD] [OneNAND] Add OMAP2 / OMAP3 OneNAND driver") DMA is disabled for OMAP2. Later fixes thus went only into OMAP3 specific DMA functions which turned out not to be so OMAP3 specific, so merge those two implementations. Signed-off-by:
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Peter Ujfalusi authored
We have 4 functions containing almost identical DMA setup code. Create one function which can set up the DMA for both read and write and use this in place for the setup code in the driver. The new function will use wait_for_completion_io_timeout() and it will figure out the best data_type to be used for the transfer instead of hardwiring 32 or 16 bit data. Signed-off-by:
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Ladislav Michl authored
Use wait_for_completion_io_timeout, which has an impact on how the task is accounted in scheduling stats. Signed-off-by:
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Ladislav Michl authored
No platform data user setups partitioning information, so remove. Signed-off-by:
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Ladislav Michl authored
No platform data user sets skip_initial_unlocking, so remove test for this field. Signed-off-by:
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Ladislav Michl authored
As no platform data user sets regulator_can_sleep, regulator code is no-op and can be deleted. Signed-off-by:
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Ladislav Michl authored
Update node timings to be compatible with actual chip used - gpmc_cs_show_timings utilized to dump values. Signed-off-by:
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Ladislav Michl authored
OMAP onenand nodes are missing compatible property, add it. Signed-off-by:
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Ladislav Michl authored
Compatible property is required for OMAP2+ mtd driver. Also add INT pin gpio description and delete unused dma-channel property. Signed-off-by:
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https://github.com/rogerq/linuxBoris Brezillon authored
Pull changes needed for omap OneNAND changes from Roger Quadros: OMAP-GPMC: driver updates for v4.16 * Error out only if both 'bank-width' and 'gpmc,device-width' DT properties are missing.
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Miquel Raynal authored
Choose to compile and embed marvell_nand.c as NAND controller driver instead of the legacy pxa3xx_nand.c for platforms with Marvell EBU SoCs. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by:
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Miquel Raynal authored
Add marvell_nand driver which aims at replacing the existing pxa3xx_nand driver. The new driver intends to be easier to understand and follows the brand new NAND framework rules by implementing hooks for every pattern the controller might support and referencing them inside a parser object that will be given to the core at each ->exec_op() call. Raw accessors are implemented, useful to test/debug memory/filesystem corruptions. Userspace binaries contained in the mtd-utils package may now be used and their output trusted. Most of the DT nodes using the old driver kept non-optimal timings from the bootloader (even if there was some mechanisms to derive them if the chip was ONFI compliant). The new default is to implement ->setup_data_interface() and follow the core's decision regarding the chip. Thanks to the improved timings, implementation of ONFI mode 5 support (with EDO managed by adding a delay on data sampling), merging the commands together and optimizing writes in the command registers, the new driver may achieve faster throughputs in both directions. Measurements show an improvement of about +23% read throughput and +24% write throughput. These measurements have been done with an Armada-385-DB-AP (4kiB NAND pages forced in 4-bit strength BCH ECC correction) using the userspace tool 'flash_speed' from the MTD test suite. Besides these important topics, the new driver addresses several unsolved known issues in the old driver which: - did not work with ECC soft neither with ECC none ; - relied on naked read/write (which is unchanged) while the NFCv1 embedded in the pxa3xx platforms do not implement it, so several NAND commands did not actually ever work without any notice (like reading the ONFI PARAM_PAGE or SET/GET_FEATURES) ; - wrote the OOB data correctly, but was not able to read it correctly past the first OOB data chunk ; - did not retrieve ECC bytes ; - used device tree bindings that did not allow more than one NAND chip, and did not allow to choose the correct chip select if not incrementing from 0. Plus, the Ready/Busy line used had to be 0. Old device tree bindings are still supported but deprecated. A more hierarchical view has to be used to keep the controller and the NAND chip structures clearly separated both inside the device tree and also in the driver code. Signed-off-by:
Sean Nyekjaer <sean.nyekjaer@prevas.dk> Tested-by:
Willy Tarreau <w@1wt.eu> Signed-off-by:
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Miquel Raynal authored
Document the legacy and the new bindings for Marvell NAND controller. The pxa3xx_nand.c driver does only support legacy bindings, which are incomplete and inaccurate. A rework of this controller (called marvell_nand.c) does support both. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Miquel Raynal authored
There are already an atmel,rb and an allwinner,rb properties, let's not make other ones and instead use a generic term: nand-rb to define NAND chips Ready/Busy lines. Signed-off-by:
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Miquel Raynal authored
Starting from commit 041e4575 ("mtd: nand: handle ECC errors in OOB"), nand_do_read_oob() (from the NAND core) did return 0 or a negative error, and the MTD layer expected it. However, the trend for the NAND layer is now to return an error or a positive number of bitflips. Deciding which status to return to the user belongs to the MTD layer. Commit e47f6858 ("mtd: check for max_bitflips in mtd_read_oob()") brought this logic to the mtd_read_oob() function while the return value coming from nand_do_read_oob() (called by the ->_read_oob() hook) was left unchanged. Fixes: e47f6858 ("mtd: check for max_bitflips in mtd_read_oob()") Cc: stable@vger.kernel.org Signed-off-by:
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Miquel Raynal authored
Reads from NAND devices usually trigger bitflips, this is an expected behavior. While bitflips are under a given threshold, the MTD core returns 0. However, when the number of corrected bitflips is above this same threshold, -EUCLEAN is returned to inform the upper layer that this block is slightly dying and soon the ECC engine will be overtaken so actions should be taken to move the data out of it. This particular condition should not be treated like an error and the test should continue. Signed-off-by:
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Nicolas Ferre authored
Update Wenyou Yang email address. Take advantage of this update to move this entry to the MICROCHIP / ATMEL location and add the DT binding documentation link. Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by:
Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by:
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- 10 Jan, 2018 1 commit
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Ladislav Michl authored
Samsung E-die SLC NAND manufactured using 21nm process (K9F1G08U0E) does not support partial page programming, so disable subpage writes for it. Manufacturing process is stored in lowest two bits of 5th ID byte. Signed-off-by:
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- 09 Jan, 2018 1 commit
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Sascha Hauer authored
The number of corrected bitflips is not correctly reported by the test until the bitflip threshold is reached. read_page() shall return the number of corrected bitflips, but mtd_read() returns 0 or a negative error, so we can't forward its return value. In the absence of an error we always have calculate the number of bitflips ourselves. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
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