- 03 Oct, 2010 3 commits
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Chris Wilson authored
Conflicts: drivers/gpu/drm/i915/i915_gem_evict.c drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_dp.c
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Keith Packard authored
Instead of waiting for the display line value to settle, we can simply wait for the pipe configuration register 'state' bit to turn off. Contrarywise, disabling the plane will not cause the display line value to stop changing, so instead we wait for the vblank interrupt bit to get set. And, we only do this when we're not about to wait for the pipe to turn off. Signed-off-by:
Keith Packard <keithp@keithp.com> Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk>
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Keith Packard authored
While the display port is in training mode, vblank interrupts don't occur. Because we have to wait for the display port output to turn on before starting the training sequence, enable the output in 'normal' mode so that we can tell when a vblank has occurred, then start the training sequence. Signed-off-by:
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- 02 Oct, 2010 2 commits
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Julia Lawall authored
Extend the error handling code with operations found in other nearby error handling code A simplified version of the sematic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r exists@ @r@ statement S1,S2,S3; constant C1,C2,C3; @@ *if (...) {... S1 return -C1;} ... *if (...) {... when != S1 return -C2;} ... *if (...) {... S1 return -C3;} // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Signed-off-by:
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Chris Wilson authored
The return from move_to_gtt_domain() may indicate a pending signal which needs to handled as opposed to an actual error, for instance, so report the original return value rather than forcing an EINVAL. Signed-off-by:
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- 01 Oct, 2010 7 commits
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Chris Wilson authored
The issue is that we may become stuck executing a long running shader and continually attempt to reset the GPU. (Or maybe we tickle some bug and need to break the vicious cycle.) So if we are detect a second hang within 5 seconds, give up trying to programme the GPU and report it wedged. Signed-off-by: -
Chris Wilson authored
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Chris Wilson authored
So far only found registers for i830, i845, i865 and one of those has no effect on i865! At this moment in time, attempting to reset i8xx is a little optimistic... Signed-off-by: -
Chris Wilson authored
When the GPU is reset, the fence registers are invalidated, so release the objects and clear them out. Signed-off-by: -
Chris Wilson authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30083Reported-by:
Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by:
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Chris Wilson authored
Only drm/i915 does the bookkeeping that makes the information useful, and the information maintained is driver specific, so move it out of the core and into its single user. Signed-off-by: -
Chris Wilson authored
Now that we hold onto a reference whilst evicting objects, we need to be sure that we drop all the references taken -- even on the error paths. Signed-off-by:
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- 30 Sep, 2010 6 commits
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Simon Que authored
Added a function that sets the LVDS values to default settings. This will be called by intel_init_bios before checking for the VBT (video BIOS table). The default values are thus loaded regardless of whether a VBT is found. The default settings in each parse function have been moved to the new function. This consolidates all the default settings into one place. The default dither bit value has been changed from 0 to 1. We can assume that display devices will want dithering enabled. Signed-off-by:
Simon Que <sque@chromium.org> Acked-by:
Olof Johansson <olof@lixom.net> [ickle: fixup for -next] Signed-off-by:
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Chris Wilson authored
At that point as the object is no longer in any GPU write domain it must not be on the list, so the list_del() is redundant. Signed-off-by: -
Chris Wilson authored
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Chris Wilson authored
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Chris Wilson authored
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Chris Wilson authored
... and check more regularly. Signed-off-by:
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- 29 Sep, 2010 3 commits
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Chris Wilson authored
Just reschedule the retire requests again if the device is currently busy. The request list will be pruned along other paths so will never grow unbounded and so we can afford to miss the occasional pruning. Signed-off-by: -
Chris Wilson authored
Replaced by tracepoints. Signed-off-by: -
Chris Wilson authored
This has bitrotted through inuse and superseded by tracing and debugfs. Signed-off-by:
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- 28 Sep, 2010 8 commits
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Chris Wilson authored
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Chris Wilson authored
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Chris Wilson authored
This check only appears to succeed when using GMBUS, so we need to skip it if we have fallen back to using GPIO bit banging. Signed-off-by: -
Chris Wilson authored
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Chris Wilson authored
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Chris Wilson authored
There are several reported instances of GMBUS failing to successfully read the EDID, so revert back to bit banging until the issue is resolved. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30371Signed-off-by:
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Chris Wilson authored
Besides a couple of bugs when writing more than a single byte along the GMBUS, SDVO was completely failing whilst trying to use GMBUS, so use bit banging instead. Signed-off-by: -
Chris Wilson authored
With multiple rings generating requests independently, the outstanding requests must also be track independently. Reported-by:
Wang Jinjin <jinjin.wang@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30380Signed-off-by:
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- 27 Sep, 2010 1 commit
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Jesse Barnes authored
The IPS driver needs to know the current power consumption of the GMCH in order to make decisions about when to increase or decrease the CPU and/or GPU power envelope. So fix up the divisions to save the results so the numbers are actually correct (contrary to some earlier comments and code, these functions do not modify the first argument and use it for the result). Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by:
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- 26 Sep, 2010 3 commits
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Chris Wilson authored
Introduced by 48b956c5, I had thought I had already fixed this. Oh well. Reported-by:
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Chris Wilson authored
There is no equivalent to mutex_destroy() for spinlocks so just delete the code. Signed-off-by: -
Chris Wilson authored
Daniel Vetter pointed out that in this case is would be clearer and cleaner to use a spinlock instead of a mutex to protect the per-file request list manipulation. Make it so. Signed-off-by:
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- 25 Sep, 2010 7 commits
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Daniel Vetter authored
It's the same code, essentially, so kill all copies safe one unified version. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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Daniel Vetter authored
All functions are extremely similar, so fold them into one generic implementation. This function isn't used anyway, because there's not yet a bsd ring error state dumper. Signed-off-by:
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Daniel Vetter authored
Two macros that use a base address for HWS_PGA were missing, add them. Also switch the remaining users of *_ACTHD to the ring-base one. Kill the other ring-specific macros because they're now unused. Signed-off-by:
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Daniel Vetter authored
This was mixed up in the following patch: commit a6c45cf0 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Sep 17 00:32:17 2010 +0100 drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g Signed-off-by:
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Daniel Vetter authored
Everything is now handled in intel-gtt.h so these defines are only confusing. Signed-off-by:
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Chris Wilson authored
... and combine it with the wedged completion handler. Signed-off-by: -
Chris Wilson authored
Owain Ainsworth reported an issue between the interaction of the hangcheck and userspace immediately (and permanently) falling back to s/w rasterisation. In order to break the mutex and begin resetting the GPU, we must abort the current operation (usually within the wait) and climb sufficiently far back up the call chain to drop the mutex. In his implementation, Owain has a loop within the ioctl handler to detect the hang and then sleep until the error handler has run. I've chosen to return to userspace and report an EAGAIN which should trigger the userspace ioctl handler to repeat the call (simply because it felt less invasive...). Before hitting a wedged GPU, we then wait upon completion of the error handler. Reported-by:
Owain G. Ainsworth <zerooa@googlemail.com> Signed-off-by:
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