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  1. 09 Oct, 2018 14 commits
  2. 08 Oct, 2018 2 commits
  3. 01 Aug, 2018 1 commit
  4. 30 Jul, 2018 1 commit
  5. 18 Jan, 2018 2 commits
  6. 13 Feb, 2017 1 commit
    • Linus Walleij's avatar
      mmc: core/mmci: restore pre/post_req behaviour · e13934bd
      Linus Walleij authored
      commit 64b12a68
      "mmc: core: fix prepared requests while doing bkops"
      is fixing a bug in the wrong way. A bug in the MMCI
      device driver is fixed by amending the MMC core.
      
      Thinking about it: what the pre- and post-callbacks
      are doing is to essentially map and unmap SG lists
      for DMA transfers. Why would we not be able to do that
      just because a BKOPS command is sent inbetween?
      Having to unprepare/prepare the next asynchronous
      request for DMA seems wrong.
      
      Looking the backtrace in that commit we can see what
      the real problem actually is:
      
      mmci_data_irq() is calling mmci_dma_unmap() twice
      which is goung to call arm_dma_unmap_sg() twice
      and v7_dma_inv_range() twice for the same sglist
      and that will crash.
      
      This happens because a request is prepared, then
      a BKOPS is sent. The IRQ completing the BKOPS command
      goes through mmci_data_irq() and thinks that a DMA
      operation has just been completed because
      dma_inprogress() reports true. It then proceeds to
      unmap the sglist.
      
      But that was wrong! dma_inprogress() should NOT be
      true because no DMA was actually in progress! We had
      just prepared the sglist, and the DMA channel
      dma_current has been configured, but NOT started!
      
      Because of this, the sglist is already unmapped when
      we get our actual data completion IRQ, and we are
      unmapping the sglist once more, and we get this crash.
      
      Therefore, we need to revert this solution pushing
      the problem to the core and causing problems, and
      instead augment the implementation such that
      dma_inprogress() only reports true if some DMA has
      actually been started.
      
      After this we can keep the request prepared during the
      BKOPS and we need not unprepare/reprepare it.
      
      Fixes: 64b12a68 ("mmc: core: fix prepared requests while doing bkops")
      Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Tested-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      e13934bd
  7. 29 Nov, 2016 2 commits
    • Linus Walleij's avatar
      mmc: mmci: refactor ST Micro busy detection · 49adc0ca
      Linus Walleij authored
      The ST Micro-specific busy detection was made after the assumption
      that only this variant supports busy detection. So when doing busy
      detection, the host immediately tries to use some ST-specific
      register bits.
      
      Since the qualcomm variant also supports some busy detection
      schemes, encapsulate the variant flags better in the variant struct
      and prepare to add more variants by just providing some bitmasks
      to the logic.
      
      Put the entire busy detection logic within an if()-clause in the
      mmci_cmd_irq() function so the code is only executed when busy
      detection is enabled, and so that it is kept in (almost) one
      place, and add comments describing what is going on so the
      code can be understood.
      
      Tested on the Ux500 by introducing some prints in the busy
      detection path and noticing how the IRQ is enabled, used and
      disabled successfully.
      
      Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      49adc0ca
    • Linus Walleij's avatar
      mmc: mmci: clean up header defines · 5db3eee7
      Linus Walleij authored
      There was some confusion in the CPSM (Command Path State Machine)
      and DPSM (Data Path State Machine) regarding the naming of the
      registers, clarify the meaning of this acronym so the naming is
      understandable, and consistently use BIT() to define these fields.
      
      Consequently name the register bit defines MCI_[C|D]PSM_* and
      adjust the driver as well.
      
      Include new definitions for a few bits found in a patch from
      Srinivas Kandagatla.
      
      Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      5db3eee7
  8. 09 Jul, 2014 3 commits
  9. 12 May, 2014 2 commits
  10. 23 Feb, 2014 1 commit
    • Ulf Hansson's avatar
      mmc: mmci: Enable support for busy detection for ux500 variant · 8d94b54d
      Ulf Hansson authored
      The ux500 variants have HW busy detection support, which is indicated
      by the busy_detect flag. For these variants let's enable the
      MMC_CAP_WAIT_WHILE_BUSY flag and add the support for it.
      
      The mmc core will provide the RSP_BUSY command flag for those requests
      we should care about busy detection. Regarding the max_busy_timeout,
      the HW don't support busy detection timeouts so at this initial step
      let's make it simple and set it to zero to indicate we are able to
      support any timeout.
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Johan Rudholm <jrudholm@gmail.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarChris Ball <chris@printf.net>
      8d94b54d
  11. 12 Feb, 2014 1 commit
  12. 19 Sep, 2013 1 commit
  13. 22 May, 2013 3 commits
  14. 28 Jan, 2013 1 commit
  15. 08 Jan, 2013 1 commit
  16. 04 Nov, 2012 1 commit
  17. 02 Feb, 2012 1 commit
  18. 20 Jan, 2012 2 commits