1. 05 Oct, 2009 2 commits
    • Paul Walmsley's avatar
      OMAP3: PM: PRCM interrupt: check MPUGRPSEL register · 5d805978
      Paul Walmsley authored
      PM_WKST register contents should be ANDed with the contents of the
      MPUGRPSEL registers.  Otherwise the MPU PRCM interrupt handler could
      wind up clearing wakeup events meant for the IVA PRCM interrupt
      handler. A future revision to this code should be to read a cached
      version of MPUGRPSEL from the powerdomain code, since PRM reads are
      relatively slow.
      
      Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman
      Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
      Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      5d805978
    • Jon Hunter's avatar
      OMAP3: PM: Prevent hang in prcm_interrupt_handler · 77da2d91
      Jon Hunter authored
      There are two scenarios where a race condition could result in a hang
      in the prcm_interrupt handler. These are:
      
      1). Waiting for PRM_IRQSTATUS_MPU register to clear.
      Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event
      is pending for the MPU. This bit can only be cleared if the all the
      wake-up events latched in the various PM_WKST_x registers have been
      cleared. If a wake-up event occurred during the processing of the prcm
      interrupt handler, after the corresponding PM_WKST_x register was
      checked but before the PRM_IRQSTATUS_MPU was cleared, then the CPU
      would be stuck forever waiting for bit 0 in PRM_IRQSTATUS_MPU to be
      cleared.
      
      2). Waiting for the PM_WKST_x register to clear.
      Some power domains have more than one wake-up source. The PM_WKST_x
      registers indicate the source of a wake-up event and need to be cleared
      after a wake-up event occurs. When the PM_WKST_x registers are read and
      before they are cleared, it is possible that another wake-up event
      could occur causing another bit to be set in one of the PM_WKST_x
      registers. If this did occur after reading a PM_WKST_x register then
      the CPU would miss this event and get stuck forever in a loop waiting
      for that PM_WKST_x register to clear.
      
      This patch address the above race conditions that would result in a
      hang.
      Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
      Reviewed-by: default avatarPaul Walmsley <paul@pwsan.com>
      Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      77da2d91
  2. 27 Sep, 2009 14 commits
  3. 26 Sep, 2009 21 commits
  4. 25 Sep, 2009 3 commits