- 28 Sep, 2018 2 commits
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Baolin Wang authored
It will be failed to select default or sleep state for pins hogged by the pin controller device, since we hadn't parsed pins configuration in device tree before registering the pin controller device. Thus we should move the device tree parsing function before registering the pin controller device. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Arnd Bergmann authored
mtk_eint_set_debounce and mtk_eint_find_irq are defined as stub functions in a header file, but without marking them as 'static inline', we get a copy for each file that includes the header: drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.o: In function `mtk_eint_set_debounce': pinctrl-mtk-common-v2.c:(.text+0x134): multiple definition of `mtk_eint_set_debounce' drivers/pinctrl/mediatek/pinctrl-moore.o:pinctrl-moore.c:(.text+0x7d0): first defined here drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.o: In function `mtk_eint_find_irq': pinctrl-mtk-common-v2.c:(.text+0x13c): multiple definition of `mtk_eint_find_irq' Fixes: e46df235 ("pinctrl: mediatek: refactor EINT related code for all MediaTek pinctrl can fit") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 26 Sep, 2018 7 commits
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Colin Ian King authored
Currently, the check on desc->eint.eint_n == EINT_NA is always false because this is comparing a u16 to -1 which can never be true. Fix this by casting EINT_NA to u16. Detected by CoverityScan, CID#1473610 ("Operands don't affect result") Fixes: fb5fa8dc ("pinctrl: mediatek: extend struct mtk_pin_desc to pinctrl-mtk-common-v2.c") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Avaneesh Kumar Dwivedi authored
Add initial pinctrl driver to support pin configuration with pinctrl framework for qcs404. Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org> Signed-off-by: Chintan Pandya <cpandya@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bjorn: Reworked tile handling and did some minor rework] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bjorn Andersson authored
Add the binding for the TLMM pinctrl block found in the QCS404 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bjorn Andersson authored
On some new platforms the tiles have been placed too far apart to be covered in a single ioremap. Turn "regs" into an array of base addresses and make the pingroup carry the information about which tile the pin resides in. For existing platforms we map the first entry regs and the existing pingroups will all use tile 0, meaning that there's no functional change. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bjorn Andersson authored
In preparation for the support for dispersed tiles move all readl and writel calls to helper functions. This will allow us to isolate the added complexity of another indirection. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Vinod Koul authored
Add support for the PMS405 GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Neeraj Upadhyay authored
Add initial pinctrl driver to support pin configuration with pinctrl framework for sdm660. Based off CAF implementation. Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org> Co-Developed-by: Venkatesh Yadav Abbarapu <vabbar@codeaurora.org> Signed-off-by: Venkatesh Yadav Abbarapu <vabbar@codeaurora.org> [craig: minor updates for upstreaming, updated tile handling] Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 25 Sep, 2018 2 commits
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Andy Shevchenko authored
Consolidate IO accessors in the code to make maintenance a little bit easier in the future. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
mrfld_read_bufcfg() helper checks if pin is correct and reads back the current value of corresponding BUFCFG register. While it adds lines of code it will be easier to maintain in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 21 Sep, 2018 9 commits
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YueHaibing authored
fixes following Smatch static check warning: ./drivers/pinctrl/sunxi/pinctrl-sunxi.c:1112 sunxi_pinctrl_build_state() warn: passing devm_ allocated variable to kfree. 'pctrl->functions' As we will be calling krealloc() on pointer 'pctrl->functions', which means kfree() will be called in there, devm_kzalloc() shouldn't be used with the allocation in the first place. Fix the warning by calling kcalloc() and managing the free procedure in error path on our own. Fixes: 0e37f88d ("ARM: sunxi: Add pinctrl driver for Allwinner SoCs") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mars Cheng authored
Just add eint support to MT6765 pinctrl driver as usual as happens on the other SoCs. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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ZH Chen authored
Add MT6765 pinctrl driver based on MediaTek pinctrl-paris core. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: ZH Chen <zh.chen@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mars Cheng authored
Add NO_EINT_SUPPORT back to pinctrl-mtk-common-v2.h as the alias of EINT_NA to indicate that some pin not capable of being controlled as eint and that is required by pinctrl-paris based driver as old pinctrl-mtk-common.h already had. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
EINT_NA is an u16 number, so it should be U16_MAX instead of -1 to fix up drivers/pinctrl/mediatek/pinctrl-paris.c:732 mtk_gpio_to_irq() warn: impossible condition (desc->eint.eint_n == -1) => (0-u16max == (-1)) Also happens in drivers/pinctrl/mediatek/pinctrl-paris.c:749 mtk_gpio_set_config() warn: impossible condition (desc->eint.eint_n == -1) => (0-u16max == (-1)) drivers/pinctrl/mediatek/pinctrl-moore.c:479 mtk_gpio_to_irq() warn: impossible condition (desc->eint.eint_n == -1) => (0-u16max == (-1)) drivers/pinctrl/mediatek/pinctrl-moore.c:496 mtk_gpio_set_config() warn: impossible condition '(desc->eint.eint_n == -1) => (0-u16max == (-1)) Fixes: 6561859b ("pinctrl: mediatek: add eint support to MT8183 pinctrl driver") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Wei Yongjun authored
In case of error, the function devm_kmalloc_array() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: b7d7f9ee ("pinctrl: mediatek: extend struct mtk_pin_desc which per-pin driver depends on") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Wei Yongjun authored
Fixes the following sparse warning: drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:37:29: warning: symbol 'mtk_drive' was not declared. Should it be static? Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Wei Yongjun authored
In case of error, the function devm_kmalloc_array() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: 80525098 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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YueHaibing authored
'ret' should be returned while pmic_mpp_write_mode_ctl fails. Fixes: 0e948042 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 20 Sep, 2018 2 commits
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Fabio Estevam authored
No user of mxs_pinctrl_probe() can be built as a module, hence exporting the symbol is not necessary. Drop EXPORT_SYMBOL_GPL. Inspired by a patch from Stefan Agner for the tegra pinctrl driver. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stefan Agner authored
No user of tegra_pinctrl_probe can be built as a module, hence exporting the symbol is not necessary. Drop EXPORT_SYMBOL_GPL. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 18 Sep, 2018 18 commits
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Linus Walleij authored
Include only <linux/gpio/driver.h> since this is a driver, not a consumer. Cc: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. While here, sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Compiler unsatisfied to see half described data structures and issues warnings: drivers/pinctrl/intel/pinctrl-cherryview.c:136: warning: Function parameter or member 'acpi_space_id' not described in 'chv_community' drivers/pinctrl/intel/pinctrl-cherryview.c:169: warning: Function parameter or member 'saved_intmask' not described in 'chv_pinctrl' drivers/pinctrl/intel/pinctrl-cherryview.c:169: warning: Function parameter or member 'saved_pin_context' not described in 'chv_pinctrl' To satisfy it, describe mentioned members. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
For the long time no one complained about unused groups of pins for fSPI and SMBUS. Remove them for good and at the same time satisfy compiler, otherwise get warning: CC drivers/pinctrl/intel/pinctrl-cherryview.o drivers/pinctrl/intel/pinctrl-cherryview.c:285:23: warning: ‘southwest_smbus_pins’ defined but not used [-Wunused-const-variable=] static const unsigned southwest_smbus_pins[] = { 79, 81, 82 }; ^~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/intel/pinctrl-cherryview.c:269:23: warning: ‘southwest_fspi_pins’ defined but not used [-Wunused-const-variable=] static const unsigned southwest_fspi_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; ^~~~~~~~~~~~~~~~~~~ Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
We have some data structures duplicated across the drivers. Let's deduplicate them by using ones that being provided by pinctrl-intel.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Sort header block alphabetically for easy maintenance. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Since the driver can't be compiled as a module, there is no need to use no-op macros in the code. Thus, remove unneeded MODULE_DEVICE_TABLE() macro from the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
We now using a common macro for PM operations in pin control drivers for Intel SoCs, and since that macro relies on the definition and macro from linux/pm.h header file, it's logical to include it directly in pinctrl-intel.h. Otherwise it's a bit fragile and requires a proper ordering of header inclusion in C files. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
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Sean Wang authored
Just add eint support to MT8183 pinctrl driver as usual as happens on the other SoCs. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
Almost all MediaTek SoCs apply the exact same logic to build eint, so move the common functions into pinctrl-mtk-common-v2.c to allow each new pinctrl driver to reuse them. Also, add a protection checker on hw->soc->eint_hw to avoid invalid memory access when there's certain SoC not to define its eint_hw properly in the code flow. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zhiyong Tao authored
This patch provides the advanced pull for I2C used pins on MT8183. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
Extend the advanced pull based on the legacy bias plus additional r0 and r1 to tweak the resistor level. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zhiyong Tao authored
Add MT8183 pinctrl driver based on MediaTek pinctrl-paris core. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zhiyong Tao authored
Add pinctrl-paris core that implements vendor dt-binding which MediaTek tablet, box and smartphone-based SoCs such as MT81xx, MT27xx, and MT67xx SoCs really want to depend on. The driver is just completely rewritten according to pinctrl-mtk-common.c but uses the new logic from pinctrl-mtk-common-v2.c to have an elegant way to support new SoCs in the future. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
Because the pincrl-mtk-common.c is an implementation for per-pin binding, its pin descriptor includes more information than pinctrl-mtk-common-v2 so far can support. So, we complement these data before writing a driver using pincrl-mtk-common-v2.c for per-pin binding. By the way, the size of struct mtk_pin_desc would be larger than struct pinctrl_pin_desc can hold, so it's necessary to have a copy before the pins information is being registered into the core. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
It's usual and not an error for there's some register not supported by a certain SoC or a pin so that in the case we have to adjust the message to print and the error code to get rid of unnecessary false alarm. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sean Wang authored
Certain SoC own multiple register base for accessing each pin groups, it's easy to be done with extend struct mtk_pin_field_calc to support the kind of SoC such as MT8183. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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