1. 27 Feb, 2004 10 commits
    • Anton Blanchard's avatar
      [PATCH] ppc64: fix pci hotplug compile error · 651de80f
      Anton Blanchard authored
      Fix a compile error in the ppc64 pci hotplug code.
      651de80f
    • Anton Blanchard's avatar
      [PATCH] ppc64: TLB flush rework · 750737f6
      Anton Blanchard authored
      ppc64 tlb flush rework from Paul Mackerras
      
      Instead of doing a double pass of the pagetables, we batch things
      up in the pte flush routines and then shoot the batch down in
      flush_tlb_pending.
      
      Our page aging was broken, we never flushed entries out of the ppc64
      hashtable. We now flush in ptep_test_and_clear_young.
      
      A number of other things were fixed up in the process:
      
      - change ppc64_tlb_batch to per cpu data
      - remove some LPAR debug code
      - be more careful with ioremap_mm inits
      - clean up arch/ppc64/mm/init.c, create tlb.c
      750737f6
    • Anton Blanchard's avatar
      [PATCH] ppc64: fix kernel access of user pages · e2801b51
      Anton Blanchard authored
      Set the ks bit on userspace segments otherwise the kernel can read/write
      into userspace mprotected pages.
      e2801b51
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64:Implement support for Apple DART IOMMU (PowerMac G5) · 565a552f
      Benjamin Herrenschmidt authored
      This allows us to use more than 2Gb of RAM on a PowerMac G5.  You can
      also boot with iommu=off to disable it, but then you get back the 2Gb
      RAM limitation.
      565a552f
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64: Fix drivers/ide when using an IOMMU · b71adb56
      Benjamin Herrenschmidt authored
      Make IDE advertise only 128 entries of SG table on archs with an IOMMU.
      
      The current IOMMU implementations of pci_map_sg() may produce segments
      that don't match the boundary requirements of IDE, thus causing the
      driver to break them up.  The BIO is supposed to account for that,
      however, it cannot account for a pci_map_sg producing a segment of the
      requested size, but with incorrect alignement, thus we may still try to
      break up the list in more entries than is supported by the HW.
      
      A similar fix already went in libata.  The "real" long term fix will be
      to move the boundary requirements to struct device so that pci_map_sg()
      can respect them when producing the sglist.  In the meantime, this
      band-aid works around the problem.
      b71adb56
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64: iommu rewrite · 556a2c9e
      Benjamin Herrenschmidt authored
      Lots of things renamed, sillicaps killed, stuffs moved around and common
      code properly extracted from implementation specific code, new
      allocator, etc...  The code is overall a lot simpler, faster, less prone
      to fail, and a lot more manageable.  I didn't use "bk mv", there is no
      need to keep the old history attached to the new file.
      556a2c9e
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64: Fix /dev/mem idea of what is memory · e2d17c13
      Benjamin Herrenschmidt authored
      This adds a hack to /dev/mem (along with the other ones already there)
      to prevent mapping cacheable of the IO hole.
      
      Without this, XFree blows up on machines with enough memory to go past
      the IO hole.  It also tries to prevent memory from beeing mapped
      uncached.  Cache paradoxes are evil and can kill the CPU.
      
      The necessary page_is_ram() call was added by the previous patch doing
      the proper IO hole accounting.
      e2d17c13
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64: physical RAM accounting fix · eca92b62
      Benjamin Herrenschmidt authored
      On machines with an IO hole (like Apple G5 with more than 2Gb of RAM,
      but also some pSeries) we failed to properly account for the real
      amount of physical RAM and inform the zone allocator of our hole size.
      
      During the process, I included Anton slaughtering of the guard page we
      had in the first 256Mb kernel segment, thus allowing this segment to be
      mapped with large pages as it should be.
      eca92b62
    • Benjamin Herrenschmidt's avatar
      [PATCH] radeonfb: small cleanup of common register init · 9f9f56a2
      Benjamin Herrenschmidt authored
      This removes the unused common_regs_m6 and add one more register to be
      cleared, according to latest XFree code from ATI.
      9f9f56a2
    • Benjamin Herrenschmidt's avatar
      [PATCH] ppc64: Fix warning on pmac build · 893eb19a
      Benjamin Herrenschmidt authored
      Fix a stupid warning in PowerMac SMP build on ppc64
      893eb19a
  2. 26 Feb, 2004 30 commits