- 23 Sep, 2018 4 commits
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Olof Johansson authored
Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Amlogic ARM64 DT updates for v4.20 - AXG: cleanup/reorder nodes - AXG: add audio PDM support for s400 board - GX: increase CMA memory size - GX: new canvas driver * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: Switch simple-mfd and syscon order arm64: dts: meson-axg-s400: Add chosen and memory nodes arm64: dts: meson-axg: use the proper compatible for ethmac arm64: dts: meson-axg: s400: add pdm to the sound card arm64: dts: meson-axg: s400: add dmic codec arm64: dts: meson-axg: add pdm arm64: dts: meson-gx: add dmcbus and canvas nodes. arm64: dts: meson: libretech: update board model arm64: dts: meson-gx: increase default shared CMA pool size arm64: dts: meson-axg: sort nodes consistently arm64: dts: meson-axg: s400: add sound card arm64: dts: meson-axg: s400: enable audio devices arm64: dts: meson-axg: add audio fifos Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt New soc support for the px30 quad-core Cortex-A35. New boards are the px30 eval board and roc-rk3399-pc. The rk3328 got support for the one gpio controlled via the general register files and the rk3399 finally got its idle-states defined. And finally fixes and improvements for firefly-rk3399 (wifi), roc-rk3328-cc (sdmmc-uhs, io-domains), rk3328-rock64 (gpio-regulator pin fix) and rk3399-sapphire (gpio-regulator pin fix, pmic pin fix and type-c port supply). * tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add type-c port supply on rk3399-sapphire board arm64: dts: rockchip: fix vcc_host1_5v pin assign on rk3328-rock64 arm64: dts: rockchip: add WiFi module support for Firefly-RK3399 arm64: dts: rockchip: remove dvs2 pinctrl from pmic on rk3399-sapphire arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire arm64: dts: rockchip: re-order vcc_sys on rk3399-sapphire arm64: dts: rockchip: add missing vop properties for px30 arm64: dts: rockchip: Add idle-states to device tree for rk3399 arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc arm64: dts: rockchip: add GRF GPIO controller to rk3328 arm64: dts: rockchip: add io-domain to roc-rk3328-cc arm64: dts: rockchip: add PX30 evaluation board devicetree arm64: dts: rockchip: add core dtsi file for PX30 SoCs dt-bindings: rockchip: grf: add grf and pmugrf description for px30 arm64: dts: rockchip: add support for ROC-RK3399-PC board Signed-off-by:
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Olof Johansson authored
Merge tag 'renesas-arm64-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM64 Based SoC DT Updates for v4.20 * Correct whitespace around assignments * R-Car Gen-3 SoCs: - Enable SDR104 for SD devices - Include R-Car product name in DTSI files to ease maintenance * R-Car Gen-3 SoC based boards: Convert to new LVDS DT bindings * R-Car Gen 3 Salvator-X and Salvator-XS boards: - Override secondary addresses of ADV748x to avoid address conflicts * R-Car Gen 3 based Salvator-XS board: Enable SATA * R-Car M3-N (r8a77965) SoC: - Add FDP1 device nodes - Move arm_cc630p and timer nodes to restore sort-order of file - Correct clock/reset for usb2_phy1 - Correct HS-USB compat string - Add OPPs table for cpu devices enabling CPUFreq support - Add CAN device placeholder nodes to facilitate adding initial device tree for KF daughter board - Attach SYS-DMAC to the IPMMU * R-Car M3-N (r8a77965) based ULCB board: - Initial device tree for board and KF daughter board * R-Car E3 (r8a77990) SoC: - Add SYS-DMAC, I2C VIN, CSI-2, MSIOF device nodes - Add BRG support to SCIF2 which allows an increase in serial clock accuracy - Use CPG/MSSR and SYSC binding definitions * R-Car E3 (r8a77990) based Ebisu board: Enable PWM * R-Car D3 (r8a77995) SoC: Attach the SYS-DMAC to the IPMMU * R-Car D3 (r8a77995) based Draak board: Sort device nodes * R-Car V3H (r8a77980) based V3HSK board: - Move lvds0 node to restore sort-order of file * R-Car V3H (r8a77980) SoC: - Add RWDT, CSI2 and VIN, Cortex-A53 PMU nodes - Move IPMMU and CAN clock nodes to restore sort-order of file * R-Car V3M (r8a77970) SoC: - Add MMC nodes - Move CAN clock node to restore sort-order of file * R-Car V3M (r8a77970) based V3MSK board: Add eMMC support * R-Car V3H (r8a77980) based Condor board: Add PCIe, DU, LVDS and HDMI support * RZ/G2M (r8a774a1) SoC: - Initial device tree - Add SYS-DMAC, SCIF, HSCIF, INTC-EX, EtherAVB, RWDT, pinctl, GPIO, SDHI, I2C, IIC-DVFS, thermal, IPMMU, MSIOF, Cortex-A53 CPU core, PWM, Audio, FCPF, FCPV, USB2.0, USB-DMAC, HSUSB and USB3.0 device nodes * tag 'renesas-arm64-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (58 commits) arm64: dts: r8a77965: add FDP1 device nodes arm64: dts: renesas: draak: Sort device nodes arm64: dts: renesas: enable SDR104 on R-Car Gen3 arm64: dts: renesas: r8a77990: Add SYS-DMAC device nodes arm64: dts: renesas: r8a77990: Add I2C device nodes arm64: dts: renesas: r8a77990: Add VIN and CSI-2 device nodes arm64: dts: renesas: r8a77990: Add all MSIOF nodes arm64: dts: renesas: r8a7795: Move arm_cc630p node arm64: dts: renesas: r8a77990: Add BRG support to SCIF2 arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions arm64: dts: renesas: salvator-xs: Improve SATA switch settings comments arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 arm64: dts: renesas: r8a77965: Fix HS-USB compatible arm64: dts: renesas: r8a77965: Move timer node arm64: dts: renesas: v3hsk: Move lvds0 node arm64: dts: renesas: Fix whitespace around assignments arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device tree arm64: dts: renesas: condor: add PCIe support arm64: dts: renesas: r8a77980: add PCIe support arm64: dts: renesas: r8a774a1: Add USB3.0 device nodes ... Signed-off-by:
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Olof Johansson authored
Merge tag 'renesas-arm-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC DT Updates for v4.20 * R-Car Gen1 SoCs: Include product name in DTSI files for ease of maintenance * R-Car Gen2 SoCs: - Convert to new DU DT bindings - Correct SATA device sizes to 2 MiB * R-Car H2 (r8a7790) based Porter board: Add DA9063 OnKey PMIC node * R-Car E2 (r8a7794) based Silk board: Add DA9063 PMIC, RTC and OnKey nodes * R-Car M2-N (r8a7793) based Gose board: Add DA9210 node for CPU DVFS * RZ/G1C (R8A77470) SoC: - Add GPIO nodes - Add PFC support - Use r8a77470-sysc binding definitions * RZ/G1C (r8a77470) iW-RainboW-G23S dev platform: - Specify EtherAVB PHY IRQ - Add pinctl support for scif1 * RZ/N1D (r9a06g032) SoC: Use r9a06g032-sysctrl binding definitions * tag 'renesas-arm-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r9a06g032: Use r9a06g032-sysctrl binding definitions ARM: dts: Include R-Car Gen1 product name in DTSI files ARM: dts: stout: Add DA9063 OnKey node ARM: dts: silk: Add DA9063 RTC and OnKey node ARM: dts: iwg23s-sbc: specify EtherAVB PHY IRQ ARM: dts: r8a77470: Add GPIO support ARM: dts: silk: Add DA9063 PMIC node ARM: dts: gose: Add DA9210 node for CPU DVFS ARM: dts: rcar-gen2: Convert to new DU DT bindings ARM: dts: iwg23s-sbc: Add pinctl support for scif1 ARM: dts: r8a77470: Add PFC support ARM: dts: r8a77470: Use r8a77470-sysc binding definitions ARM: dts: rcar: Correct SATA device sizes to 2 MiB Signed-off-by:
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- 13 Sep, 2018 36 commits
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Neil Armstrong authored
The order between "syscon" and "simple-mfd" is important because in these particular cases, the node needs to be first a "simple-mfd" to expose it's sub-nodes, and later on a "syscon" to permit other nodes to access this register space through the "syscon" mechanism. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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Hoan Nguyen An authored
The r8a77965 has a single FDP1 instance. Signed-off-by:
Hoan Nguyen An <na-hoan@jinso.co.jp> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
- Device nodes with unit addresses are sorted by unit address, - Device nodes without unit addresses and references are sorted alphabetically. Signed-off-by:Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Wolfram Sang authored
Successfully tested on H3 ES1.0 and ES2.0, M3-W ES1.0, and M3-N ES1.0. Even previously stubborn cards work fine. Transfer rates were >60MB/s. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Takeshi Kihara authored
This patch adds SYS-DMAC{0,1,2} device nodes for the R8A77990 SoC. Signed-off-by:Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by:
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Takeshi Kihara authored
Add device nodes for I2C ch[0-7] to R-Car E3 R8A77990 device tree. Signed-off-by:
Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by:
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Koji Matsuoka authored
Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. Signed-off-by:
Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by:
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Geert Uytterhoeven authored
Add the device nodes for all MSIOF SPI controllers, incl. clocks, power domains, and resets properties. Signed-off-by:
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Geert Uytterhoeven authored
To preserve by-address-per-group sort order. Fixes: 0f6d237c ("arm64: dts: renesas: r8a7795: add ccree to device tree") Signed-off-by:
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Takeshi Kihara authored
Add the device node for the external SCIF_CLK, and describe the clock inputs for the Baud Rate Generator for External Clock (BRG) for SCIF2, which can increase serial clock accuracy. The presence of the SCIF_CLK crystal and its clock frequency depend on the actual board. Signed-off-by:
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Geert Uytterhoeven authored
Use the SoC-specific CPG/MSSR include file to allow future use of R8A77990_CLK_* symbols. Replace the hardcoded power domain indices by R8A77990_PD_* symbols. Signed-off-by:
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Geert Uytterhoeven authored
The comments describing the non-default switch settings to use SATA are confusing: 'Off' refers to the switch position, not to the MD12 logic value, while the parentheses suggest otherwise. Rephrase to fix this. Fixes: bec000784d5bb571 ("arm64: dts: renesas: salvator-xs: enable SATA") Signed-off-by: -
Geert Uytterhoeven authored
usb2_phy1 accidentally uses the same clock/reset as usb2_phy0. Fixes: b5857630 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes") Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by:
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Geert Uytterhoeven authored
Should be "renesas,usbhs-r8a77965", not "renesas,usbhs-r8a7796". Fixes: a06e8af8 ("arm64: dts: renesas: r8a77965: add HS-USB node") Signed-off-by:
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Geert Uytterhoeven authored
To preserve alphabetical sort order. Fixes: 4c529600 ("arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support") Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by:
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Geert Uytterhoeven authored
To preserve alphabetical sort order. Fixes: 4edac426aff11a37 ("arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI support") Signed-off-by: -
Geert Uytterhoeven authored
Signed-off-by:
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Eugeniu Rosca authored
This is based on the existing KF device tree sources: $ ls -1 arch/arm64/boot/dts/renesas/*-kf.dts arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts Signed-off-by:
Eugeniu Rosca <erosca@de.adit-jv.com> Signed-off-by:
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Sergei Shtylyov authored
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor board. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by:
Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
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Sergei Shtylyov authored
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by:
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Biju Das authored
Add usb3.0 phy, host and function device nodes on RZ/G2M SoC dtsi. Signed-off-by:
Biju Das <biju.das@bp.renesas.com> Reviewed-by:
Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by:
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Biju Das authored
Add usb dmac and hsusb device nodes on RZ/G2M SoC dtsi. Signed-off-by:
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Biju Das authored
Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2M SoC dtsi. Signed-off-by:
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Fabrizio Castro authored
Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly to what was done for the r8a7796 with commit 41dbbf0c ("arm64: dts: r8a7796: Add FCPF and FCPV instances"), commit 69490bc9 ("arm64: dts: renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0"), and commit cef942d0 ("arm64: dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0"). Signed-off-by:
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Biju Das authored
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1). This work is based on similar work done on the R8A7796 SoC by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by:
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Fabrizio Castro authored
This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1) device tree. Signed-off-by:
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Biju Das authored
This patch adds definitions for L2 cache for the Cortex-A53 CPU cores (512 KiB in size, organized as 32 KiB x 16 ways), adds Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57 + 4 x Cortex-A53), and finally enables the performance monitor unit for the Cortex-A53 cores on the R8A774A1 SoC. Based on work done for r8a7796 SoC. Signed-off-by:
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Biju Das authored
Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC. Based on several similar patches of the R8A7796 device tree by Geert Uytterhoeven <geert+renesas@glider.be> and Simon Horman <horms+renesas@verge.net.au>. Signed-off-by:
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Fabrizio Castro authored
Add r8a774a1 IPMMU nodes. Signed-off-by:
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Biju Das authored
Add thermal support for R8A774A1 (RZ/G2M) SoC. Based on the work done for r8a7796 SoC. Signed-off-by:
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Biju Das authored
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS) devices nodes to the r8a774a1 device tree. Signed-off-by:
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Fabrizio Castro authored
Add SDHI nodes to the DT of the r8a774a1 SoC. Signed-off-by:
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Fabrizio Castro authored
Add GPIO device nodes to the DT of the r8a774a1 SoC. Signed-off-by:
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Fabrizio Castro authored
This patch adds pinctrl device node for R8A774A1 SoC. Signed-off-by:
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Biju Das authored
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas RZ/G2M (r8a774a1) SoC. Signed-off-by:
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Fabrizio Castro authored
This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by:
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