1. 10 Feb, 2011 1 commit
  2. 07 Feb, 2011 1 commit
    • Hans Rosenfeld's avatar
      x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs · cabb5bd7
      Hans Rosenfeld authored
      L3 Cache Partitioning allows selecting which of the 4 L3 subcaches can be used
      for evictions by the L2 cache of each compute unit. By writing a 4-bit
      hexadecimal mask into the the sysfs file
      /sys/devices/system/cpu/cpuX/cache/index3/subcaches, the user can set the
      enabled subcaches for a CPU.
      
      The settings are directly read from and written to the hardware, so there is no
      way to have contradicting settings for two CPUs belonging to the same compute
      unit. Writing will always overwrite any previous setting for a compute unit.
      Signed-off-by: default avatarHans Rosenfeld <hans.rosenfeld@amd.com>
      Cc: <Andreas.Herrmann3@amd.com>
      LKML-Reference: <1297098639-431383-1-git-send-email-hans.rosenfeld@amd.com>
      [ -v3: minor style fixes ]
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      cabb5bd7
  3. 26 Jan, 2011 3 commits
  4. 25 Jan, 2011 29 commits
  5. 24 Jan, 2011 6 commits