1. 25 Sep, 2018 1 commit
  2. 24 Sep, 2018 1 commit
  3. 21 Sep, 2018 5 commits
  4. 19 Sep, 2018 1 commit
  5. 18 Sep, 2018 2 commits
  6. 17 Sep, 2018 1 commit
    • Suzuki K Poulose's avatar
      arm64: sysreg: Clean up instructions for modifying PSTATE fields · 74e24828
      Suzuki K Poulose authored
      Instructions for modifying the PSTATE fields which were not supported
      in the older toolchains (e.g, PAN, UAO) are generated using macros.
      We have so far used the normal sys_reg() helper for defining the PSTATE
      fields. While this works fine, it is really difficult to correlate the
      code with the Arm ARM definition.
      
      As per Arm ARM, the PSTATE fields are defined only using Op1, Op2 fields,
      with fixed values for Op0, CRn. Also the CRm field has been reserved
      for the Immediate value for the instruction. So using the sys_reg()
      looks quite confusing.
      
      This patch cleans up the instruction helpers by bringing them
      in line with the Arm ARM definitions to make it easier to correlate
      code with the document. No functional changes.
      
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      74e24828
  7. 14 Sep, 2018 9 commits
  8. 11 Sep, 2018 9 commits
  9. 10 Sep, 2018 5 commits
  10. 07 Sep, 2018 3 commits
    • Will Deacon's avatar
      Merge branch 'tlb/asm-generic' into aarch64/for-next/core · cbbac1c3
      Will Deacon authored
      As agreed on the list, merge in the core mmu_gather changes which allow
      us to track the levels of page-table being cleared. We'll build on this
      in our low-level flushing routines, and Nick and Peter also have plans
      for other architectures.
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      cbbac1c3
    • Will Deacon's avatar
      MAINTAINERS: Add entry for MMU GATHER AND TLB INVALIDATION · 7526aa54
      Will Deacon authored
      We recently had to debug a TLB invalidation problem on the munmap()
      path, which was made more difficult than necessary because:
      
        (a) The MMU gather code had changed without people realising
        (b) Many people subtly misunderstood the operation of the MMU gather
            code and its interactions with RCU and arch-specific TLB invalidation
        (c) Untangling the intended behaviour involved educated guesswork and
            plenty of discussion
      
      Hopefully, we can avoid getting into this mess again by designating a
      cross-arch group of people to look after this code. It is not intended
      that they will have a separate tree, but they at least provide a point
      of contact for anybody working in this area and can co-ordinate any
      proposed future changes to the internal API.
      
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Nicholas Piggin <npiggin@gmail.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
      Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Michal Hocko <mhocko@suse.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      7526aa54
    • Peter Zijlstra's avatar
      mm/memory: Move mmu_gather and TLB invalidation code into its own file · 196d9d8b
      Peter Zijlstra authored
      In preparation for maintaining the mmu_gather code as its own entity,
      move the implementation out of memory.c and into its own file.
      
      Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Michal Hocko <mhocko@suse.com>
      Signed-off-by: default avatarPeter Zijlstra <peterz@infradead.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      196d9d8b
  11. 04 Sep, 2018 3 commits