- 13 May, 2016 40 commits
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Kelvin Cheung authored
This patch renames the file to loongson1-cpufreq.c, and also includes some minor updates. Signed-off-by:
Kelvin Cheung <keguang.zhang@gmail.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: linux-pm@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13052/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Just to ease debugging of multiplatform kernel, make sure we print "Broadcom BMIPS5200" for the BMIPS5200 implementation instead of Broadcom BMIPS5000. Fixes: 68e6a783 ("MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)") Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13014/Signed-off-by:
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Florian Fainelli authored
BMIPS_GENERIC being multiplatform and intended to support BMIPS3200, BMIPS3300, BMIPS4350, BMIPS4380 and BMIPS5000-class processors, there is not much more we can put in there since they do not share the same I and D cache line sizes at all (doubled for every new generation essentially), some processors have a S-cache, some don't, some have a FPU, some don't. Signed-off-by:
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Florian Fainelli authored
local_r4k___flush_cache_all() is missing a special check for BMIPS5000 processors, we need to blast the S-cache, just like other MTI processors since we have an inclusive cache. We also need an additional __sync() to make sure this is completed. Fixes: d74b0172 ("MIPS: BMIPS: Add special cache handling in c-r4k.c") Signed-off-by:
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Florian Fainelli authored
BMIPS5000 and BMIPS5200 processor have no D cache aliases, and this is properly handled by the per-CPU override added at the end of r4k_cache_init(), the problem is that the output of probe_pcache() disagrees with that, since this is too late: Primary instruction cache 32kB, VIPT, 4-way, linesize 64 bytes. Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes With the change moved earlier, we now have a consistent output with the settings we are intending to have: Primary instruction cache 32kB, VIPT, 4-way, linesize 64 bytes. Primary data cache 32kB, 4-way, VIPT, no aliases, linesize 32 bytes Fixes: d74b0172 ("MIPS: BMIPS: Add special cache handling in c-r4k.c") Signed-off-by:
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Florian Fainelli authored
BMIPS5000 and BMIPS52000 processors have their I-cache filling from the D-cache. Since BMIPS_GENERIC does not provide (yet) a cpu-feature-overrides.h file, this was not set anywhere, so make sure the R4K cache detection takes care of that. Fixes: d74b0172 ("MIPS: BMIPS: Add special cache handling in c-r4k.c") Signed-off-by:
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Florian Fainelli authored
Enable CONFIG_MTD_BCM63XX_PARTS in arch/mips/configs/bmips_be_defconfig since this is a necessary option to parse the built-in flash partition table on BMIPS big-endian SoCs (Cable Modem and DSL). Signed-off-by:
Brian Norris <computersforpeace@gmail.com> Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: simon@fire.lp0.eu Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12256/Signed-off-by:
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Florian Fainelli authored
Enable CONFIG_MTD_BCM63XX_PARTS in arch/mips/configs/bcm63xx_defconfig since this is a necessary option to parse the built-in flash partition table on BCM63xx SoCs. Signed-off-by:
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Kelvin Cheung authored
This patch adds Loongson1 architecture entry. Signed-off-by:
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Kelvin Cheung authored
- Add DMA device - Add NAND device - Add GPIO device - Add LED device - Update the defconfig and rename it to loongson1b_defconfig - Fix ioremap size - Other minor fixes Signed-off-by:
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Maciej W. Rozycki authored
... making upstream development binutils snapshots work as expected, e.g.: $ mips64el-linux-ld --version GNU ld (GNU Binutils) 2.20.1.20100303 [...] $ Signed-off-by:
Maciej W. Rozycki <macro@imgtec.com> Acked-by:
Michal Marek <mmarek@suse.cz> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-kbuild@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12537/Signed-off-by:
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Jaedon Shin authored
Fixes wrong bcm7425 SATA AHCI hardware interrupt property value with periph_intc and SATA PHY unit address, and removes needless brcm,broken-{ncq,phy} properties what are not used anywhere. Signed-off-by:Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by:
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Jaedon Shin authored
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based platforms. Signed-off-by:
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Yang Shi authored
In Kconfig "=n" is not correct syntax, "!" is the preferred way for false-positive expression. Signed-off-by:
Yang Shi <yang.shi@windriver.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12572/Signed-off-by:
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Matt Redfearn authored
When debugging a relocated kernel, the addresses of the relocated symbols and the offset applied is essential information. If the kernel is compiled with debugging information, then print this information during bootup using the same function as the panic notifier. [ralf@linux-mips.org: Fixed spelling mistake pointed out by Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>.] Signed-off-by:
Matt Redfearn <matt.redfearn@imgtec.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Alexander Sverdlin <alexander.sverdlin@gmail.com> Cc: Jaedon Shin <jaedon.shin@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: kernel-hardening@lists.openwall.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12989/Signed-off-by:
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Matt Redfearn authored
This patch adds KASLR to the MIPS kernel. Entropy is derived from the banner, which will change every build and random_get_entropy() which should provide additional runtime entropy. Additionally the bootloader may pass entropy via the /chosen/kaslr-seed node in device tree. The kernel is relocated by up to RANDOMIZE_BASE_MAX_OFFSET bytes from its link address (PHYSICAL_START). Because relocation happens so early in the kernel boot, the amount of physical memory has not yet been determined. This means the only way to limit relocation within the available memory is via Kconfig. Signed-off-by:
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Matt Redfearn authored
Early access to the kernel command line requires early access to the FDT for platforms which pass the command line within the device tree. There was no common way to retrieve the location of the FDT without incurring side effects, such as plat_mem_setup which, on Malta at least, initializes a bunch of other stuff. This patch adds plat_get_ftd() for IMG platforms. Signed-off-by:
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Matt Redfearn authored
Add option to KConfig to enable the kernel to relocate itself at runtime. Relocation is supported R2 and later of the MIPS architecture, 32bit and 64bit. The platform is also required to provide support through plat_get_fdt() added in a later patch. Signed-off-by:
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Matt Redfearn authored
The kernel reserves all memory before the _end symbol as bootmem, however, once the kernel can be relocated elsewhere in memory this may result in a large amount of wasted memory. The assumption is that the memory between the link and relocated address of the kernel may be released back to the available memory pool. Memory statistics for a Malta with the kernel relocating by 16Mb, without the patch: Memory: 105952K/131072K available (4604K kernel code, 242K rwdata, 892K rodata, 1280K init, 183K bss, 25120K reserved, 0K cma-reserved) And with the patch: Memory: 122336K/131072K available (4604K kernel code, 242K rwdata, 892K rodata, 1280K init, 183K bss, 8736K reserved, 0K cma-reserved) The 16Mb offset is removed from the reserved region and added back to the available region. Signed-off-by:
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Matt Redfearn authored
If CONFIG_RELOCATABLE is enabled, call relocate_kernel. This function will return the entry point of the relocated kernel if copy/relocate is sucessful or the original entry point if not. The stack pointer must then be pointed into the new image. Signed-off-by:
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Matt Redfearn authored
arch/mips/kernel/relocate.c contains the functions necessary to relocate the kernel elsewhere in memory The kernel makes a copy of itself at the new address. It uses the relocation table inserted by the relocs tool to fix symbol references within the new image. If copy/relocation is sucessful then the entry point of the new kernel is returned, otherwise fall back to starting the kernel in place. Signed-off-by:
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Matt Redfearn authored
When CONFIG_RELOCATABLE is enabled (added in later patch) add --emit-relocs to vmlinux LDFLAGS so that fully linked vmlinux contains relocation information. Run the previously added relocs tool to fill in the .data.relocs section of vmlinux with a table of relocations. The relocs tool will also remove (mark as 0 length) the relocation sections added to vmlinux. When vmlinux is passed to the boot makefile for conversion into a boot image the now empty relocation sections will be removed and the populated relocation table will be included in the binary image. Signed-off-by:
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Matt Redfearn authored
When CONFIG_RELOCATABLE is enabled, add a new section in the memory map to be filled with relocation data. CONFIG_RELOCATION_TABLE_SIZE allows the amount of space reserved to be adjusted if necessary. The relocs tool will populate this reserved space with relocation information. The space is reserved within the elf by filling it with 0's, and an invalid entry is left at the start of the space such that kernel relocation will be aborted if the table is empty. Signed-off-by:
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Matt Redfearn authored
Build the relocs tool as part of the kbuild Signed-off-by:
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Matt Redfearn authored
This tool is based on the x86/boot/tools/relocs tool. It parses the relocations present in the vmlinux elf file, building a table of relocations that will be necessary to run the kernel from an address other than its link address. This table is inserted into the vmlinux elf, in the .data.relocs section. The table is subsequently used by the code in arch/mips/kernel/relocate.c (added later) to relocate the kernel. The tool, by default, also marks all relocation sections as 0 length. This is due to objcopy currently being unable to handle copying the relocations between 64 and 32 bit elf files as is done when building a 64 bit kernel. Signed-off-by:
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Matt Redfearn authored
These values are constant and should be marked as such. Signed-off-by:
Kees Cook <keescook@chromium.org> Cc: Will Drewry <wad@chromium.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: IMG-MIPSLinuxKerneldevelopers@imgtec.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12979/Signed-off-by:
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Matt Redfearn authored
Previously the seccomp would only support strict mode on O32 userland programs when the kernel had support for both O32 and N32 ABIs. Remove kludge and support both ABIs. With this patch in place, the seccomp_bpf self test now passes global.mode_strict_support with N32 userland. Suggested-by:
Paul Burton <paul.burton@imgtec.com> Signed-off-by:
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Matt Redfearn authored
Move retrieval of compat syscall numbers into inline function defined in asm-generic header so that arches may override it. [ralf@linux-mips.org: Resolve merge conflict.] Suggested-by:
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Matt Redfearn authored
Commit d218af78 ("MIPS: scall: Always run the seccomp syscall filters") modified the syscall code to always call the seccomp filters, but missed the case where a filter may redirect the syscall, as revealed by the seccomp_bpf self test. The syscall path now restores the syscall from the stack after the filter rather than saving it locally. Syscall number checking and syscall function table lookup is done after the filter may have run such that redirected syscalls are also checked, and executed. The regular path of syscall number checking and pointer lookup is also made more consistent between ABIs with scall64-64.S being the reference. With this patch in place, the seccomp_bpf self test now passes TRACE_syscall.syscall_redirected and TRACE_syscall.syscall_dropped on all MIPS ABIs. Fixes: d218af78 ("MIPS: scall: Always run the seccomp syscall filters") Signed-off-by:
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Matt Redfearn authored
The seccomp_bpf self test revealed that a 64bit kernel delivered an invalid SIG_SYS to a 32bit userspace, because it was falling into the default of the switch statement. Add a case to handle delivering the signal. With this patch, the seccomp_bpf self test now passes the TRAP.handler case with O32 and N32 userlands. Signed-off-by:
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Matt Redfearn authored
This adds self-test support on MIPS, based on RFC patch from Kees Cook. Modifications from the RFC: - support the O32 syscall which passes the real syscall number in a0. - Use PTRACE_{GET,SET}REGS - Because SYSCALL_NUM and SYSCALL_RET are the same register, it is not possible to test modifying the syscall return value when skipping, since both would need to set the same register. Therefore modify that test case to just detect the skipped test. Tested on MIPS32r2 / MIPS64r2 with O32, N32 and N64 userlands. Signed-off-by: -
Martin Schiller authored
This patch updates the compatible string in the easy50712.dts file to the new "lantiq,danube-pinctrl". Signed-off-by:
Martin Schiller <mschiller@tdt.de> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Cc: robh+dt@kernel.org Cc: pawel.moll@arm.com Cc: mark.rutland@arm.com Cc: ijc+devicetree@hellion.org.uk Cc: galak@codeaurora.org Cc: john@phrozen.org Cc: hauke@hauke-m.de Cc: jogo@openwrt.org Cc: daniel.schwierzeck@gmail.com Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11589/Signed-off-by:
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Daniel Wagner authored
parse_crash_elf{32|64}_headers will check the headers via the elf_check_arch respectively vmcore_elf64_check_arch macro. The MIPS architecture implements those two macros differently. In order to make the differentiation more explicit, let's introduce an vmcore_elf32_check_arch to allow the archs to overwrite it. Signed-off-by:Daniel Wagner <daniel.wagner@bmw-carit.de> Suggested-by:
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Simon Arlott authored
Add device tree binding for the BCM6345 interrupt controller. This controller is similar to the SMP-capable BCM7038 and the BCM3380 but with packed interrupt registers. Signed-off-by:
Simon Arlott <simon@fire.lp0.eu> Acked-by:
Rob Herring <robh@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11804/Signed-off-by:
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Borislav Petkov authored
Option is long gone, see 5d9efa7e ("ipv6: Remove privacy config option.") Signed-off-by:
Borislav Petkov <bp@suse.de> Cc: linux-mips@linux-mips.org Cc: LKML <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/12919/Signed-off-by:
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Stephen Boyd authored
The generic header file is equivalent to the MIPS one, so use the generic one instead. Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Cc: linux-kernel@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12261/Signed-off-by:
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Paul Burton authored
It's possible for pages to become visible prior to update_mmu_cache running if a thread within the same address space preempts the current thread or runs simultaneously on another CPU. That is, the following scenario is possible: CPU0 CPU1 write to page flush_dcache_page flush_icache_page set_pte_at map page update_mmu_cache If CPU1 maps the page in between CPU0's set_pte_at, which marks it valid & visible, and update_mmu_cache where the dcache flush occurs then CPU1s icache will fill from stale data (unless it fills from the dcache, in which case all is good, but most MIPS CPUs don't have this property). Commit 4d46a67a ("MIPS: Fix race condition in lazy cache flushing.") attempted to fix that by performing the dcache flush in flush_icache_page such that it occurs before the set_pte_at call makes the page visible. However it has the problem that not all code that writes to pages exposed to userland call flush_icache_page. There are many callers of set_pte_at under mm/ and only 2 of them do call flush_icache_page. Thus the race window between a page becoming visible & being coherent between the icache & dcache remains open in some cases. To illustrate some of the cases, a WARN was added to __update_cache with this patch applied that triggered in cases where a page about to be flushed from the dcache was not the last page provided to flush_icache_page. That is, backtraces were obtained for cases in which the race window is left open without this patch. The 2 standout examples follow. When forking a process: [ 15.271842] [<80417630>] __update_cache+0xcc/0x188 [ 15.277274] [<80530394>] copy_page_range+0x56c/0x6ac [ 15.282861] [<8042936c>] copy_process.part.54+0xd40/0x17ac [ 15.289028] [<80429f80>] do_fork+0xe4/0x420 [ 15.293747] [<80413808>] handle_sys+0x128/0x14c When exec'ing an ELF binary: [ 14.445964] [<80417630>] __update_cache+0xcc/0x188 [ 14.451369] [<80538d88>] move_page_tables+0x414/0x498 [ 14.457075] [<8055d848>] setup_arg_pages+0x220/0x318 [ 14.462685] [<805b0f38>] load_elf_binary+0x530/0x12a0 [ 14.468374] [<8055ec3c>] search_binary_handler+0xbc/0x214 [ 14.474444] [<8055f6c0>] do_execveat_common+0x43c/0x67c [ 14.480324] [<8055f938>] do_execve+0x38/0x44 [ 14.485137] [<80413808>] handle_sys+0x128/0x14c These code paths write into a page, call flush_dcache_page then call set_pte_at without flush_icache_page inbetween. The end result is that the icache can become corrupted & userland processes may execute unexpected or invalid code, typically resulting in a reserved instruction exception, a trap or a segfault. Fix this race condition fully by performing any cache maintenance required to keep the icache & dcache in sync in set_pte_at, before the page is made valid. This has the added bonus of ensuring the cache maintenance always happens in one location, rather than being duplicated in flush_icache_page & update_mmu_cache. It also matches the way other architectures solve the same problem (see arm, ia64 & powerpc). Signed-off-by:Ionela Voinescu <ionela.voinescu@imgtec.com> Cc: Lars Persson <lars.persson@axis.com> Fixes: 4d46a67a ("MIPS: Fix race condition in lazy cache flushing.") Cc: Steven J. Hill <sjhill@realitydiluted.com> Cc: David Daney <david.daney@cavium.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jerome Marchand <jmarchan@redhat.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: stable <stable@vger.kernel.org> # v4.1+ Patchwork: https://patchwork.linux-mips.org/patch/12722/Signed-off-by:
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Paul Burton authored
The following patch will expose __update_cache to highmem pages. Handle them by mapping them in for the duration of the cache maintenance, just like in __flush_dcache_page. The code for that isn't shared because we need the page address in __update_cache so sharing became messy. Given that the entirity is an extra 5 lines, just duplicate it. Signed-off-by:
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Paul Burton authored
When flush_dcache_page is called on an executable page, that page is about to be provided to userland & we can presume that the icache contains no valid entries for its address range. However if the icache does not fill from the dcache then we cannot presume that the pages content has been written back as far as the memories that the dcache will fill from (ie. L2 or further out). This was being done for lowmem pages, but not for highmem which can lead to icache corruption. Fix this by mapping highmem pages & flushing their content from the dcache in __flush_dcache_page before providing the page to userland, just as is done for lowmem pages. Signed-off-by:
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Paul Burton authored
The flush_kernel_dcache_page function was previously essentially a nop. This is incorrect for MIPS, where if a page has been modified & either it aliases or it's executable & the icache doesn't fill from dcache then the content needs to be written back from dcache to the next level of the cache hierarchy (which is shared with the icache). Implement this by simply calling flush_dcache_page, treating this kmapped cache flush function (flush_kernel_dcache_page) exactly the same as its non-kmapped counterpart (flush_dcache_page). Signed-off-by:
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