- 22 Apr, 2019 3 commits
-
-
Anson Huang authored
On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
This enables the Vivante GC7000L GPU on the i.MX8MQ SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
The Zii Ultra design, also known as RDU3, is the i.MX8M based successor to the the i.MX6 based RDU2. This adds the basic board support for all components which are supported by the upstream kernel at this time. The board comes in 2 different versions, called RMB3 and Zest, which are derived from the same design, but have different layouts and a few small differences in the populated components. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 11 Apr, 2019 9 commits
-
-
Lucas Stach authored
According to the datasheet both industrial and consumer variants support at least 1.3GHz CPU frequency at 1.0V. Only the OPP at 1.5GHz is unavailable on some SKUs and thus need further fuse reading support. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
Enable PCIE0 interface connected to BCM4356 WiFi/Bluetooth module. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
Add nodes for two PCIe controllers found on i.MX8MQ. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
According to NXP's FAE feedback and a comment in ATF firmware, PCIE1 and PCIE2 power domains can't really be used independently. Due to shared reset line both power domains have to be turned on at the same time. Account for that quirk by combining PCIE power domains into a single 'pgc_pcie' power domain. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
Add a node for reset controller IP block found on i.MX8MQ. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
Mark iomuxc_gpr as compatible with "fsl,imx6q-iomuxc-gpr" in order for to allow i.MX6 PCIe driver to use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Daniel Baluta authored
lpuart nodes are part of the ADMA subsystem. See Audio DMA memory map in iMX8 QXP RM [1] This patch is based on the dtsi file initially submitted by Teo Hall in i.MX NXP internal tree. [1] https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdfSigned-off-by: Teo Hall <teo.hall@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Peng Ma authored
Add SATA device nodes for fsl-lx2160a and enable support for QDS and RDB boards. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Peng Ma authored
Ls1028a SATA ecc address with more than 32 bit, so we should corrrect the address. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 03 Apr, 2019 3 commits
-
-
Angus Ainslie (Purism) authored
Set ahb clock on sdma1 to get rid of "Timeout waiting for CH0" on the imx8mq. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Angus Ainslie (Purism) authored
Fix a typo in the compatible string Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Anson Huang authored
Add i.MX8QXP system controller watchdog support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 29 Mar, 2019 1 commit
-
-
Fabio Estevam authored
thermal-zones node does not have any register properties and thus shouldn't be placed inside the bus. Move thermal-zones node from soc node to root node in order to fix the following build warning with W=1: arch/arm64/boot/dts/freescale/imx8mq.dtsi:305.18-364.6: Warning (simple_bus_reg): /soc@0/bus@30000000/thermal-zones: missing or empty reg/ranges property Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 26 Mar, 2019 2 commits
-
-
Jacky Bai authored
Add basic dts support for i.MM8MM LPDDR4 EVK. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jacky Bai authored
The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators This patch adds the basic dtsi support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 22 Mar, 2019 4 commits
-
-
Fabio Estevam authored
Move opp-table node from soc node to root node. opp-table node does not have any register properties and thus shouldn't be placed inside the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/imx8mq.dtsi:687.28-703.5: Warning (simple_bus_reg): /soc@0/opp-table: missing or empty reg/ranges property Fixes: 64d26f8c ("arm64: dts: imx8mq: Add the opp table and cores opp properties") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Horia Geantă authored
crypto node alias is needed by U-boot to identify the node and perform fix-ups, like adding "fsl,sec-era" property or deleting a job ring child node (in case ARM TF-A is running). Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Frieder Schrempf authored
After switching to the new FSL QSPI driver the properties 'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore. The driver now uses the 'reg' property to determine the bus and the chipselect. The endianness is selected by the driver depending on which SoC is used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Angus Ainslie (Purism) authored
Add the imx8mq TMU (Thermal management unit) nodes for CPU, GPU, and VPU. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 21 Mar, 2019 2 commits
-
-
Peng Fan authored
Add lsio_mu2 node which could be used communicate with SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Peng Fan authored
Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but actually mu0-4 could be used to communicate with SCU. So fix the mbox-cells. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Fixes: 3d91ba65 ("arm64: dts: imx: add imx8qxp support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 20 Mar, 2019 5 commits
-
-
Manivannan Sadhasivam authored
Enable PCI-E controller for Oxalis board based on NXP/Freescale LS1012a SoC available as the Mini PCI-E connector on the bottom side. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Alison Wang authored
This patch adds pmu dt nodes for LS1028A. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Daniel Baluta authored
The main Audio DAC used on the EVK board is wm8524 The EVK provides the MCLK to wm8524. Digital interface is SAI2 which includes three signals: SYNC_CLK, BCLK and DACDAT. This patch sets: * SAI2 pinctrl configuration * clock hierarchy * wm8524 codec Then uses simple-card machine driver to connect them into a sound card. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Daniel Baluta authored
SAI2 is part of AIPS-3 memory region. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Daniel Baluta authored
SDMA1 is part of AIPS-3 region and SDMA2 is part of AIPS-1 region. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 19 Mar, 2019 7 commits
-
-
Anson Huang authored
i.MX8MQ has clock gate for each GPIO bank, add clock info to GPIO node for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Abel Vesa authored
Add the 0.8GHz and 1GHz opps. According to the datasheet: https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf section 3.1.3 Operating ranges. The 0.8GHz opp runs in nominal mode with the regulator set to 0.9V. The 1GHz runs in overdrive mode with the regulator set to 1V. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Abel Vesa authored
According to the schematics, this is a MP2147 switch converter which is controlled by GPIO1_IO13. When set the gpio is set to high the regulator output is set to 0.9V. When the gpio is set to low the regulator output is set to 1V. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Abel Vesa authored
The clocks and their latencies will be used by cpufreq-dt. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Alison Wang authored
This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Carlo Caione authored
Add the node for the OTP controller. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Anson Huang authored
Add i.MX8QXP CPU opp table to support cpufreq. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 17 Mar, 2019 4 commits
-
-
Linus Torvalds authored
-
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuildLinus Torvalds authored
Pull more Kbuild updates from Masahiro Yamada: - add more Build-Depends to Debian source package - prefix header search paths with $(srctree)/ - make modpost show verbose section mismatch warnings - avoid hard-coded CROSS_COMPILE for h8300 - fix regression for Debian make-kpkg command - add semantic patch to detect missing put_device() - fix some warnings of 'make deb-pkg' - optimize NOSTDINC_FLAGS evaluation - add warnings about redundant generic-y - clean up Makefiles and scripts * tag 'kbuild-v5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kconfig: remove stale lxdialog/.gitignore kbuild: force all architectures except um to include mandatory-y kbuild: warn redundant generic-y Revert "modsign: Abort modules_install when signing fails" kbuild: Make NOSTDINC_FLAGS a simply expanded variable kbuild: deb-pkg: avoid implicit effects coccinelle: semantic code search for missing put_device() kbuild: pkg: grep include/config/auto.conf instead of $KCONFIG_CONFIG kbuild: deb-pkg: introduce is_enabled and if_enabled_echo to builddeb kbuild: deb-pkg: add CONFIG_ prefix to kernel config options kbuild: add workaround for Debian make-kpkg kbuild: source include/config/auto.conf instead of ${KCONFIG_CONFIG} unicore32: simplify linker script generation for decompressor h8300: use cc-cross-prefix instead of hardcoding h8300-unknown-linux- kbuild: move archive command to scripts/Makefile.lib modpost: always show verbose warning for section mismatch ia64: prefix header search path with $(srctree)/ libfdt: prefix header search paths with $(srctree)/ deb-pkg: generate correct build dependencies
-
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 asm updates from Thomas Gleixner: "Two cleanup patches removing dead conditionals and unused code" * 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/asm: Remove unused __constant_c_x_memset() macro and inlines x86/asm: Remove dead __GNUC__ conditionals
-
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull perf fixes from Thomas Gleixner: "Three fixes for the fallout from the TSX errata workaround: - Prevent memory corruption caused by a unchecked out of bound array index. - Two trivial fixes to address compiler warnings" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel: Make dev_attr_allow_tsx_force_abort static perf/x86: Fixup typo in stub functions perf/x86/intel: Fix memory corruption
-