- 28 Jan, 2008 13 commits
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Paul Gortmaker authored
This adds the device tree source for the Wind River SBC834x board. It is based on the MPC834x_MDS DTS, with the biggest difference being the lack of BCSR and the PCI2 that the MDS gets via the PIB. That, and this file is also dts-v1 format. Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Paul Gortmaker authored
This adds the basic support for the Wind River SBC834x boards. The SBC8349 is more common, although it should work on the SBC8347 board as well. Support is heavily based on the existing MPC834x_MDS code. Signed-off-by:
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Paul Gortmaker authored
This is a suitable .config file for building the WRS SBC8548 kernel to be used for NFS root via one of the TSEC interfaces and with serial console via the soc/16550 compatible UART. Signed-off-by:
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Paul Gortmaker authored
This adds a v1 device tree source for the Wind River SBC8548 board. The biggest difference between this and the MPC8548CDS reference platform is the absence of the CDS's Arcadia peripherals and physical access to the PCI#2 bus. Signed-off-by:
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Paul Gortmaker authored
This adds the basic support for the Wind River SBC8548 board, implemented as powerpc. It closely follows the implementation of the MPC8548CDS. Signed-off-by:
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Paul Gortmaker authored
This is a suitable .config file for building the WRS SBC8560 kernel to be used for NFS root via one of the TSEC interfaces and with serial console via the 16550 compatible UART on the board. Signed-off-by:
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Paul Gortmaker authored
Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by:
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Paul Gortmaker authored
This adds a v1 device tree source for the Wind River SBC8560 board. The biggest difference between this and the MPC8560ADS reference platform dts is the use of an external 16550 compatible UART instead of the CPM2. Signed-off-by:
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Paul Gortmaker authored
This adds support for the Wind River SBC8560 board, implemented as powerpc. It closely follows the implementation of the MPC8560ADS. Signed-off-by:
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Paul Gortmaker authored
The legacy_serial was treating each UART parent in a separate code block. Rather than continue this trend for the new parent IDs, this condenses all (soc, tsi, opb, plus two more new types) into one of_device_id array. The new types are wrs,epld-localbus for the Wind River sbc8560, and a more generic "simple-bus" as requested by Scott Wood. Signed-off-by:
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Grant Likely authored
Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
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Li Yang authored
Signed-off-by:
Li Yang <leoli@freescale.com> Signed-off-by:
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Zhang Wei authored
Signed-off-by:
Zhang Wei <wei.zhang@freescale.com> Signed-off-by:
Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by:
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- 27 Jan, 2008 5 commits
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Kumar Gala authored
Signed-off-by: -
Kumar Gala authored
Signed-off-by: -
Kumar Gala authored
The bd info struct changes if we have CPM2 enabled in u-boot. Signed-off-by: -
Kumar Gala authored
Add the ability to find a device node by just what its compatible with. This is useful in cases that we don't have a prop to find the node with. Signed-off-by: -
Kumar Gala authored
The common arch/powerpc code calls in to functions in setup-bus.c so some builds of ppc32 would fail. Note, ppc32 usage of setup-irq.c is limited to arch/ppc and should be removed when arch/ppc goes away. Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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- 26 Jan, 2008 2 commits
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Paul Mackerras authored
This reverts commit 5c3f5892, basically because it changes behaviour even when no fake NUMA information is specified on the kernel command line. Firstly, it changes the nid, thus destroying the real NUMA information. Secondly, it also changes behaviour in that if a node ends up with no memory in it because of the memory limit, we used to set it online and now we don't. Also, in the non-NUMA case with no fake NUMA information, we do node_set_online once for each LMB now, whereas previously we only did it once. I don't know if that is actually a problem, but it does seem unnecessary. Signed-off-by:
Paul Mackerras <paulus@samba.org>
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Paul Mackerras authored
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- 25 Jan, 2008 20 commits
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Roel Kluin authored
logical/bitand typo Signed-off-by:
Roel Kluin <12o3l@tiscali.nl> Signed-off-by:
Josh Boyer <jwboyer@linux.vnet.ibm.com>
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Sean MacLennan authored
Add the defconfig for the PIKA Warp board Signed-off-by:
Sean MacLennan <smaclennan@pikatech.com> Signed-off-by:
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Sean MacLennan authored
Add the cuboot wrapper for the PIKA Warp board Signed-off-by:
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Sean MacLennan authored
Add the device tree for the PIKA Warp board Signed-off-by:
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Sean MacLennan authored
Add the base platform support for the PIKA Warp boards. Signed-off-by:
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Sean MacLennan authored
This adds the 440EP revision C PVR to the CPU table. The chip has an FPU on it, so we also match the logical PVR Signed-off-by:
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David Gibson authored
This patch extends the Ebony and Walnut platform code to instantiate the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip found on both those boards. The patch uses a helper function to scan the device tree and instantiate the appropriate platform_device based on it, so it should be easy to extend for other boards which have mmio mapped RTC chips. Along with this, the device tree binding for the ds1743 chips is tweaked, based on the existing DS1385 OF binding found at: http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt Although that document covers the NVRAM portion of the chip, whereas here we're interested in the RTC portion, so it's not entirely clear if that's a good model. This implements only RTC class driver support - that is /dev/rtc0, not /dev/rtc, and the low-level get/set time callbacks remain unimplemented. That means in order to get at the clock you will either need a modified version of hwclock which will look at /dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc. Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
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Stefan Roese authored
The patch adds the Haleakala dts. The Haleakala is a stripped down version of the Kilauea (405EX) with only one EMAC and only one PCIe interface. Signed-off-by:
Stefan Roese <sr@denx.de> Signed-off-by:
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Stefan Roese authored
This patch adds the 405EXr to the powerpc cuptable. Basically the 405EXr is a 405EX with only one EMAC and only one PCIe interface. Signed-off-by:
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Olaf Hering authored
Signed-off-by:
Olaf Hering <olaf@aepfle.de> Signed-off-by:
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Olaf Hering authored
Commit 6d98bda7 changed the init order for chrp_pci_fixup_vt8231_ata(). It can not work anymore because either the irq is not yet set to 14 or pci_get_device() returns nothing. At least the printk() in chrp_pci_fixup_vt8231_ata() does not trigger anymore. pata_via works again on Pegasos with the change below. Signed-off-by:
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Michael Ellerman authored
Currently the IOMMU code allocates one page for the segment table, that isn't safe if we have more than 132 GB of RAM. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Acked-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
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Michael Ellerman authored
Since commit c80d9133 (Make direct DMA use node local allocations) went in this comment makes no sense. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Michael Ellerman authored
We no longer need the global dma_direct_offset, update the comment to reflect the new reality. Signed-off-by:
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Michael Ellerman authored
Rather than using the global variable, have celleb use its own variable to store the direct DMA offset. Signed-off-by:
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Michael Ellerman authored
Rather than using the global variable, have cell use its own variable to store the direct DMA offset. Signed-off-by:
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Michael Ellerman authored
Now that all platforms using dma_direct_offset setup the archdata.dma_data correctly, we can change the dma_direct_ops to retrieve the offset from the dma_data, rather than directly from the global. While we're here, change the way the offset is used - instead of or'ing it into the value, add it. This should have no effect on current implementations where the offset is far larger than memory, however in future we may want to use smaller offsets. Signed-off-by:
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Michael Ellerman authored
Celleb always uses dma_direct_ops, and sets dma_direct_offset, so it too should set dma_data to dma_direct_offset. Currently there's no pci_dma_dev_setup() routine for Celleb so add one. Signed-off-by:
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Michael Ellerman authored
Store the direct_dma_offset in each device's dma_data in the case where we're using the direct DMA ops. We need to make sure we setup the ppc_md.pci_dma_dev_setup() callback if we're using a non-zero offset. Signed-off-by:
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Benjamin Herrenschmidt authored
We must always hookup the pci_bus resource 0 to the PHB io_resource even if the latter is empty (the bus has no IO support). Otherwise, some other code will end up hooking it up to something bogus and the resource tree will end up being broken. This fixes boot on QS20 Cell blades where the IDE driver failed to allocate the IO resources due to breakage of the resource tree. Signed-off-by:
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