- 04 Mar, 2014 13 commits
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Hans de Goede authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
Roman Byshko <rbyshko@gmail.com> Signed-off-by:
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Hans de Goede authored
Signed-off-by:
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Hans de Goede authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Hans de Goede authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Based on fex file settings, the fex file also contains a mysterious line: usb_hub_vcc_en_gpio = port:PB09<1><0><default><0> Which also clashes with usbc0, which has: usb_drv_vbus_gpio = port:PB09<1><0><default><0> So if usb does not work properly we need someone with a hackberry to look closer into this. Signed-off-by:
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Roman Byshko authored
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by:
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Hans de Goede authored
This patch adds sunxi sata support to A20 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added. Signed-off-by:
Olliver Schinagl <oliver@schinagl.nl> Signed-off-by:
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Oliver Schinagl authored
This patch adds sunxi sata support to A10 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added. Signed-off-by:
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Hans de Goede authored
Most sunxi boards with a sata connector also have a gpio controlled connector for sata target power and almost all sunxi boards have a gpio controlled vbus for usb1 and usb2. This commit adds an include file for the regulators representing these supplies, avoiding the need to copy and paste the regulator code to allmost all sunxi board dts files. Signed-off-by:
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- 28 Feb, 2014 1 commit
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Maxime Ripard authored
The module 0 clock compatibles were changed between the time the patch was sent and it was merged. Update the compatibles. Signed-off-by:
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- 24 Feb, 2014 6 commits
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Maxime Ripard authored
The A20-Olinuxino-micro has two SPI bus exposed on its UEXT connectors, enable them. Signed-off-by: -
Maxime Ripard authored
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Maxime Ripard authored
The A13 has 3 SPI controllers compatible with the one found in the A10. Add them in the DT. Signed-off-by: -
Maxime Ripard authored
The A10s has 3 SPI controllers compatible with the one found in the A10. Add them in the DT. Signed-off-by: -
Maxime Ripard authored
The A10 has 4 SPI controllers that are now supported. Add them in the DT. Signed-off-by: -
Maxime Ripard authored
The A20 has 4 SPI controllers compatible with the one found in the A10. Add them in the DT. Signed-off-by:
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- 22 Feb, 2014 1 commit
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Hans de Goede authored
According to Documentation/devicetree/bindings/regulator/regulator.txt regulator nodes should not be placed under 'simple-bus'. Mark Rutland also explains about it at: http://www.spinics.net/lists/linux-usb/msg101497.htmlSigned-off-by:
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- 18 Feb, 2014 5 commits
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Maxime Ripard authored
Switch the device tree to the new compatibles introduced in the clock drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: -
Marc Zyngier authored
The Allwinner A20 SoC is built around a pair of Cortex-A7 cores, which have the usual generic timers. Report this in the DT. Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
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Roman Byshko authored
Signed-off-by:
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Roman Byshko authored
Signed-off-by:
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Roman Byshko authored
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- 10 Feb, 2014 7 commits
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Chen-Yu Tsai authored
All Allwinner A20 boards we support can only use either EMAC or GMAC, as they share the same pins. As we have switched all supported to GMAC, we should alias GMAC (the active controller) as ethernet0, so u-boot will insert the MAC address for the correct controller. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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Chen-Yu Tsai authored
GMAC has better performance and fewer hardware issues. Use the GMAC in MII mode for ethernet instead of the EMAC. Signed-off-by:
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Chen-Yu Tsai authored
GMAC has better performance and fewer hardware issues. Use the GMAC in MII mode for ethernet instead of the EMAC. Signed-off-by:
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Chen-Yu Tsai authored
The CubieTruck uses the GMAC with an RGMII phy. Signed-off-by:
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Chen-Yu Tsai authored
The A20 has EMAC and GMAC muxed on the same pins. Add pin sets with gmac function for MII and RGMII mode to the DTSI. Signed-off-by:
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Chen-Yu Tsai authored
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Chen-Yu Tsai authored
The GMAC uses 1 of 2 sources for its transmit clock, depending on the PHY interface mode. Add both sources as dummy clocks, and as parents to the GMAC clock node. Signed-off-by:
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- 07 Feb, 2014 6 commits
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Chen-Yu Tsai authored
Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match and add clock-output-names to all sunxi clock nodes. Signed-off-by:
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Chen-Yu Tsai authored
Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match and add clock-output-names to all sunxi clock nodes. Signed-off-by:
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Chen-Yu Tsai authored
Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match and add clock-output-names to all sunxi clock nodes. Signed-off-by:
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Chen-Yu Tsai authored
Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match and add clock-output-names to all sunxi clock nodes. Signed-off-by:
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Maxime Ripard authored
The A31 has 4 SPI controllers. Add them in the DTSI. Signed-off-by: -
Maxime Ripard authored
The module clocks in the A31 are still compatible with the A10 one. Add the SPI module clocks and the PLL6 in the device tree to allow their use by the SPI controllers. Signed-off-by:
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- 03 Feb, 2014 1 commit
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Maxime Ripard authored
Some UART aliases have been defined, but not all of them. Add the remaining ones to be consistent and to ease the parsing of the DT by the bootloaders. Signed-off-by:
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