- 11 Jun, 2015 40 commits
-
-
Ivan Vecera authored
RXF_E_PAUSE & RXF_E_RESUME events are never sent for bna_rxf object so they needn't to be handled. The bna_rxf's state bna_rxf_sm_fltr_clr_wait and function bna_rxf_fltr_clear are unused after this so remove them also. Signed-off-by:
Ivan Vecera <ivecera@redhat.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
Ivan Vecera authored
Signed-off-by:
-
Ivan Vecera authored
Signed-off-by:
-
Ivan Vecera authored
Signed-off-by:
-
Ivan Vecera authored
removed: bna_rx_ucast_add bna_rx_ucast_del simplified: bna_enet_pause_config bna_rx_mcast_delall bna_rx_mcast_listset bna_rx_mode_set bna_rx_ucast_listset bna_rx_ucast_set Signed-off-by:
-
Ivan Vecera authored
Signed-off-by:
-
Ivan Vecera authored
replaced macros: BNA_MAC_IS_EQUAL -> ether_addr_equal BNA_POWER_OF_2 -> is_power_of_2 BNA_TO_POWER_OF_2_HIGH -> roundup_pow_of_two removed unused macros: bfa_fsm_get_state bfa_ioc_clr_stats bfa_ioc_fetch_stats bfa_ioc_get_alt_ioc_fwstate bfa_ioc_isr_mode_set bfa_ioc_maxfrsize bfa_ioc_mbox_cmd_pending bfa_ioc_ownership_reset bfa_ioc_rx_bbcredit bfa_ioc_state_disabled bfa_sm_cmp_state bfa_sm_get_state bfa_sm_send_event bfa_sm_set_state bfa_sm_state_decl BFA_STRING_32 BFI_ADAPTER_IS_{PROTO,TTV,UNSUPP) BFI_IOC_ENDIAN_SIG BNA_{C,RX,TX}Q_PAGE_INDEX_MAX BNA_{C,RX,TX}Q_PAGE_INDEX_MAX_SHIFT BNA_{C,RX,TX}Q_QPGE_PTR_GET BNA_IOC_TIMER_FREQ BNA_MESSAGE_SIZE BNA_QE_INDX_2_PTR BNA_QE_INDX_RANGE BNA_Q_GET_{C,P}I BNA_Q_{C,P}I_ADD BNA_Q_FREE_COUNT BNA_Q_IN_USE_COUNT BNA_TO_POWER_OF_2 containing_rec Signed-off-by: -
Ivan Vecera authored
Signed-off-by:
-
Ivan Vecera authored
The patch converts mac_t type to widely used 'u8 [ETH_ALEN]'. Signed-off-by:
-
Ivan Vecera authored
Parameters of all ether_addr_copy instances were checked for proper alignment. Alignment of bnad_bcast_addr is forced to 2 as the implicit alignment is 1. I have also renamed address parameter of bnad_set_mac_address() to addr. The name mac_addr was a little bit confusing as the real parameter is struct sockaddr *. v2: added __aligned directive to bnad_bcast_addr, renamed parameter of bnad_set_mac_address() (thx joe@perches.com) Signed-off-by: -
David S. Miller authored
Or Gerlitz says: ==================== mlx5 Ethernet driver update - Jun 11 2015 This series from Saeed, Achiad and Gal contains few fixes to the recently introduced mlx5 Ethernet functionality. ==================== Signed-off-by: -
Achiad Shochat authored
Allocate and use transport domain by the Ethernet driver code. Signed-off-by:
Achiad Shochat <achiad@mellanox.com> Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com> Signed-off-by:
Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by:
-
Achiad Shochat authored
Each transport object, namely TIR and TIS, must have a transport domain number (TDN) identifier. The driver wrongly assumed that it is OK to use TDN=0 without explicit TDN allocation from the device. The TDN will also be used for isolating different processes once user mode Ethernet will be supported. Signed-off-by:
-
Saeed Mahameed authored
When NETIF_F_SG is set, each send WQE may have a different size since each skb can have different number of fragments as of LSO header etc. This implies that a given WQE may wrap around the send queue, i.e begin at its end and continue at its start. While it is legal by the device spec, we preferred a solution that avoids it - when building of current WQE is done, if the next WQE may wrap around the send queue, fill the send queue with NOPs WQEs till its end, so that the next WQE will begin at send queue start. NOP WQE for itself cannot wrap around the send queue since it is of minimal size - 64 bytes, and all send WQEs are a multiple of that size. Signed-off-by:
-
Gal Pressman authored
The Ethernet driver requires at least 3 flow table levels to operate, enforce that. Signed-off-by:
Gal Pressman <galp@mellanox.com> Signed-off-by:
-
Saeed Mahameed authored
We need to resolve a HW configuration issue for enabling HW CVLAN insertion. Meanwhile, no need to implement the VLAN insertion in the driver, rather use the generic kernel VLAN insertion method. Signed-off-by:
-
Saeed Mahameed authored
Enable HW cacheline start padding and align RX WQE size to cacheline while considering HW start padding. Also, fix dma_unmap call to use the correct SKB data buffer size. Signed-off-by:
-
Saeed Mahameed authored
Previously we configured HW MTU to be netdev->mtu, actually we need to configure netdev->mtu + (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN). Also, query MTU can not fail, hence make the relevant helper a void functionm, add mlx5e_set_dev_port_mtu, helper function to handle MTU setting. Signed-off-by:
-
Dan Carpenter authored
We return success if mlx5e_alloc_sq_db() fails but we should return an error code. Fixes: f62b8bb8 ('net/mlx5: Extend mlx5_core to support ConnectX-4 Ethernet functionality') Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Acked-by:
-
Fabian Frederick authored
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by:
Fabian Frederick <fabf@skynet.be> Signed-off-by:
-
Fabian Frederick authored
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by:
-
Fabian Frederick authored
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by:
-
Fabian Frederick authored
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by:
-
Fabian Frederick authored
Use kernel.h macro definition. Thanks to Julia Lawall for Coccinelle scripting support. Signed-off-by:
-
Geoff Levand authored
When the DEBUG preprocessor macro is defined the ps3_gelic_net driver build fails due to an undeclared routine gelic_descr_get_status(). This problem was introduced during the code cleanup of commit 6b0c21ce (net: Fix p3_gelic_net sparse warnings), which re-arranged the ordering of some of the gelic routines. This change just moves the gelic_descr_get_status() routine up in the ps3_gelic_net.c source file. There is no functional change. Fixes build errors like these: drivers/net/ethernet/toshiba/ps3_gelic_net.c: error: implicit declaration of function gelic_descr_get_status Signed-off-by:
Geoff Levand <geoff@infradead.org> Signed-off-by:
-
Hadar Hen Zion authored
Add strings array of the current supported tunable options. Signed-off-by:
Hadar Hen Zion <hadarh@mellanox.com> Reviewed-by:
Amir Vadai <amirv@mellanox.com> Signed-off-by:
-
David S. Miller authored
Florian Fainelli says: ==================== net: broadcom MDIO support for broken turn-around These two patches update the GENET and UniMAC MDIO controllers to deal with PHYs that are known to have a broken turn-around bug (e.g: BCM53125 and others) This utilizes the infrastructure that code recently added to do that in 'net-next'. Note that the changes look nearly identical and I will try to address the MDIO code duplication between GENET and UniMAC in a future patch series. Changes in v2: - remove brcmphy.h include in mdio-bcm-unimac.c - use the same comment as with GENET's MDIO read function ==================== Signed-off-by: -
Florian Fainelli authored
Some Ethernet PHYs/switches such as Broadcom's BCM53125 have a hardware bug which makes them not release the MDIO line during turn-around time. This gets flagged by the UniMAC MDIO controller as a read failure, and we fail the read transaction. Check the MDIO bus phy_ignore_ta_mask bitmask for the PHY we are reading from and if it is listed in this bitmask, ignore the read failure and proceed with returning the data we read out of the controller. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
-
Florian Fainelli authored
Some Ethernet PHYs/switches such as Broadcom's BCM53125 have a hardware bug which makes them not release the MDIO line during turn-around time. This gets flagged by the GENET MDIO controller as a read failure, and we fail the read transaction. Check the MDIO bus phy_ignore_ta_mask bitmask for the PHY we are reading from and if it is listed in this bitmask, ignore the read failure and proceed with returning the data we read out of the controller. Signed-off-by:
-
Gustavo Zacarias authored
Add PHY IDs for Davicom DM9161B and DM9161C variants. Tested with a DM9161C on a custom Atmel-based SAM9X25 board in RMII mode. The DM9161B uses the same model id with just the LSB bit of the version id changing (which is masked out). For all intents and purposes they're the same as the DM9161A with an added GPSI mode and better fabrication process. Signed-off-by:
Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by:
-
Sergei Shtylyov authored
Ethernet AVB device includes the gPTP timer, so we can implement a PTP clock driver. We're doing that in a separate file, with the main Ethernet driver calling the PTP driver's [de]initialization and interrupt handler functions. Unfortunately, the clock seems tightly coupled with the AVB-DMAC, so when that one leaves the operation mode, we have to unregister the PTP clock... :-( Based on the original patches by Masaru Nagai. Signed-off-by:
Masaru Nagai <masaru.nagai.vx@renesas.com> Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
-
Sergei Shtylyov authored
Ethernet AVB includes an Gigabit Ethernet controller (E-MAC) that is basically compatible with SuperH Gigabit Ethernet E-MAC. Ethernet AVB has a dedicated direct memory access controller (AVB-DMAC) that is a new design compared to the SuperH E-DMAC. The AVB-DMAC is compliant with 3 standards formulated for IEEE 802.1BA: IEEE 802.1AS timing and synchronization protocol, IEEE 802.1Qav real- time transfer, and the IEEE 802.1Qat stream reservation protocol. The driver only supports device tree probing, so the binding document is included in this patch. Based on the original patches by Mitsuhiro Kimura. Signed-off-by:
Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com> Signed-off-by:
-
Kenneth Klette Jonassen authored
CAIA Delay-Gradient (CDG) is a TCP congestion control that modifies the TCP sender in order to [1]: o Use the delay gradient as a congestion signal. o Back off with an average probability that is independent of the RTT. o Coexist with flows that use loss-based congestion control, i.e., flows that are unresponsive to the delay signal. o Tolerate packet loss unrelated to congestion. (Disabled by default.) Its FreeBSD implementation was presented for the ICCRG in July 2012; slides are available at http://www.ietf.org/proceedings/84/iccrg.html Running the experiment scenarios in [1] suggests that our implementation achieves more goodput compared with FreeBSD 10.0 senders, although it also causes more queueing delay for a given backoff factor. The loss tolerance heuristic is disabled by default due to safety concerns for its use in the Internet [2, p. 45-46]. We use a variant of the Hybrid Slow start algorithm in tcp_cubic to reduce the probability of slow start overshoot. [1] D.A. Hayes and G. Armitage. "Revisiting TCP congestion control using delay gradients." In Networking 2011, pages 328-341. Springer, 2011. [2] K.K. Jonassen. "Implementing CAIA Delay-Gradient in Linux." MSc thesis. Department of Informatics, University of Oslo, 2015. Cc: Eric Dumazet <edumazet@google.com> Cc: Yuchung Cheng <ycheng@google.com> Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: Neal Cardwell <ncardwell@google.com> Cc: David Hayes <davihay@ifi.uio.no> Cc: Andreas Petlund <apetlund@simula.no> Cc: Dave Taht <dave.taht@bufferbloat.net> Cc: Nicolas Kuhn <nicolas.kuhn@telecom-bretagne.eu> Signed-off-by:Kenneth Klette Jonassen <kennetkl@ifi.uio.no> Acked-by:
Yuchung Cheng <ycheng@google.com> Signed-off-by:
-
Kenneth Klette Jonassen authored
Upcoming tcp_cdg uses tcp_enter_cwr() to initiate PRR. Export this function so that CDG can be compiled as a module. Cc: Eric Dumazet <edumazet@google.com> Cc: Yuchung Cheng <ycheng@google.com> Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: Neal Cardwell <ncardwell@google.com> Cc: David Hayes <davihay@ifi.uio.no> Cc: Andreas Petlund <apetlund@simula.no> Cc: Dave Taht <dave.taht@bufferbloat.net> Cc: Nicolas Kuhn <nicolas.kuhn@telecom-bretagne.eu> Signed-off-by:
-
Scott Feldman authored
If CONFIG_NET_SWITCHDEV is enabled, but port driver does not implement support for IPv4 FIB add/del ops, don't fail route add/del offload operations. Route adds will not be marked as OFFLOAD. Routes will be installed in the kernel FIB, as usual. This was report/fixed by Florian when testing DSA driver with net-next on devices with L2 offload support but no L3 offload support. What he reported was an initial route installed from DHCP client would fail (route not installed to kernel FIB). This was triggering the setting of ipv4.fib_offload_disabled, which would disable route offloading after the first failure. So subsequent attempts to install the route would succeed. There is follow-on work/discussion to address the handling of route install failures, but for now, let's differentiate between no support and failed support. Reported-by:
Scott Feldman <sfeldma@gmail.com> Signed-off-by:
-
David S. Miller authored
Florian Fainelli says: ==================== net: phy: broadcom: define pseudo-PHY address This patch series converts existing in-tree users of the Broadcom pseudo-PHY address (30) used to configure MDIO-connected switches to share a constant in a shared header files. ==================== Signed-off-by: -
Florian Fainelli authored
Utilize the newly introduced BRCM_PSEUDO_PHY_ADDR constant from brcmphy.h instead of open-coding the Broadcom Ethernet switches pseudo-PHY address (30). Signed-off-by:
-
Florian Fainelli authored
What BGMAC defines as BGMAC_PHY_NOREGS is in fact the Broadcom Ethernet switches' pseudo-PHY address (30), utilize the newly introduced constant from brcmphy.h Signed-off-by:
-
Florian Fainelli authored
What B44 has been locally using as B44_PHY_ADDR_NO_LOCAL_PHY is in fact the Broadcom Ethernet switches pseudo-PHY address (30). Update the header to use the newly introduced constant and update comments so they are within 80 columns and consistent. Signed-off-by:
-
Florian Fainelli authored
Define the pseudo-PHY address (30) which is used by all Broadcom Ethernet switches in a shared header file. Signed-off-by:
-
