Merge tag 'imx-dt64-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.6:

 - New board support: i.MX8MQ based Thor96 board, Google i.MX8MQ Phanbell
   board, LX2160A based Solidrun Clearfog CX and Honeycomb boards.
 - Add eLCDIF controller and missing SAI nodes for i.MX8MQ SoC.
 - Add Crypto CAAM support for i.MX8MM and i.MX8MN.
 - Drop unneeded "simple-bus" from anatop node on i.MX8MM and i.MX8MN.
 - Drop unused/undocumented "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
   compatibles from i.MX8M SoCs.
 - Add DDR controller nodes for i.MX8M devices.
 - Add EEPROM description for imx8mq-hummingboard-pulse and
   imx8mq-sr-som boards.
 - Enable USB1 and TypeC support for imx8mn-evk board.
 - Add FlexSPI and QSPI support for a few Layerscape SoCs and boards.
 - Add External MDIO1 node and the two RGMII PHYs connected on LX2160A.
 - Add missing SAI devices and set SAIs into async mode on LS1028A.
 - Other random device additions and enhancement for various platforms.

* tag 'imx-dt64-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (35 commits)
  arm64: dts: imx8mn: Memory node should be in board DT
  arm64: dts: imx8mm: Memory node should be in board DT
  arm64: dts: imx8mn: add crypto node
  arm64: dts: imx8mq-hummingboard-pulse: add eeprom description
  arm64: dts: imx8mq-sr-som: add eeprom description
  arm64: dts: ls208xa: Update qspi node properties for LS2088ARDB
  arm64: dts: freescale: Add devicetree support for Thor96 board
  arm64: dts: imx8mq-librem5-devkit: add accelerometer and gyro sensor
  arm64: dts: imx8mm: Add Crypto CAAM support
  arm64: dts: freescale: add initial support for Google i.MX 8MQ Phanbell
  arm64: dts: ls1028a-rdb: enable emmc hs400 mode
  arm64: dts: ls1028a: Update edma compatible to fit eDMA driver
  arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
  arm64: dts: imx8mm: Add missing mux options for UART1 and UART2 signals
  arm64: dts: lx2160a: add dts for CEX7 platforms
  arm64: dts: lx2160a: add emdio2 node
  arm64: dts: ls1028a: put SAIs into async mode
  arm64: dts: ls1028a: add missing sai nodes
  arm64: dts: imx8mn-evk: enable usb1 and typec support
  arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF
  ...

Link: https://lore.kernel.org/r/20200113034006.17430-5-shawnguo@kernel.orgSigned-off-by: Olof Johansson <olof@lixom.net>

i.MX device tree update for 5.6:

 - New board support: i.MX6SL based Tolino Shine 3 eBook reader,
   i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks
   Ventana Boards.
 - A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and
   VF610 ZII boards.
 - Add revision in board compatible string for imx6sx-sdb-reva and
   imx7d-sdb-reva board.
 - A fixup on imx6sl-tolino-shine3 board to remove incorrect power
   supply assignment.
 - Set initial buck regulator modes explicitly for phycore-imx6 board,
   so that a wrong initial mode set by bootloader does not interfere.
 - Add Add LCD support for imx7d-pico board.
 - A couple of patches from Michael Grzeschik to enhance USB Host
   support on i.MX25.
 - A couple of patches from Michael Trimarchi to remove duplicate
   Ethernet PHY reset properties on imx6qdl-icore and switch to
   phy-handle.
 - A couple of changes to add extirq node support on LS1021A SoC and
   make use of it on the LS1021A-TSN board.
 - A few random device additions and improvements on various boards.

* tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
  ARM: dts: imx: Add GW5912 board support
  ARM: dts: imx: Add GW5913 board support
  ARM: dts: imx: Add GW5910 board support
  ARM: dts: imx: Add GW5907 board support
  ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property
  ARM: dts: imx6sl-tolino-shine3: Remove incorrect power supply assignment
  ARM: dts: imx7d-pico: Add LCD support
  ARM: dts: imx6qdl-icore: Add fec phy-handle
  ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods
  ARM: dts: imx7: Unify temp-grade and speed-grade nodes
  ARM: dts: imx6: phycore-som: add pmic onkey device
  ARM: dts: imx51-babbage: Fix the DVI output description
  ARM: dts: imx6qdl-apalis: mux HDMI CEC pin
  ARM: dts: imx6sll: add PXP module
  ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments
  ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog
  ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes
  ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties
  ARM: dts: phycore-imx6: set buck regulator modes explicitly
  ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed
  ...

Link: https://lore.kernel.org/r/20200113034006.17430-4-shawnguo@kernel.orgSigned-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'imx-bindings-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.6:

 - Add compatibles for boards:
     i.MX6 SoloX SDB Rev-A Board
     i.MX7 SabreSD Rev-A Board
     i.MX6SL based Tolino Shine 3 eBook reader
     i.MX7ULP Embedded Artists COM Board
     i.MX8MQ Thor96 Board
     i.MX8MQ based Google Coral Edge TPU
     i.MX6Q/DL based Gateworks Ventana Boards
     LX2160A based QDS and RDB Boards
 - Add missing imx6sll into fsl-pxp bindings.
 - Add i.MX8MQ LCDIF compatible into mxsfb bindings.

* tag 'imx-bindings-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: Add Gateworks Ventana i.MX6DL/Q compatibles
  dt-bindings: arm: Add devicetree binding for Thor96 Board
  dt-bindings: arm: Add Google Coral Edge TPU entry
  bindings: fsl: document compatibles of lx2160a boards
  media: dt-bindings: media: fsl-pxp: add missing imx6sll
  dt-bindings: arm: fsl: Document i.MX7ULP Embedded Artists COM board
  dt-bindings: mxsfb: Add compatible for iMX8MQ
  dt-bindings: arm: fsl: add compatible string for Tolino Shine 3
  dt-bindings: arm: imx: Add the i.MX7D-SDB Rev-A board
  dt-bindings: arm: imx: Add the i.MX6SX-SDB Rev-A board

Link: https://lore.kernel.org/r/20200113034006.17430-3-shawnguo@kernel.orgSigned-off-by: Olof Johansson <olof@lixom.net>

mvebu dt64 for 5.6 (part 1)

 micro-DPU (uDPU) board changes (Armada 3270 based board):
 - Fix broken ethernet
 - Remove i2c-fast-mode property
 - Indicate that SFP cages support 3W modules
 SolidRun Clearfog GT 8K (Armada 8040 base board):
 - Fix switch cpu port node

* tag 'mvebu-dt64-5.6-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
  arm64: dts: uDPU: SFP cages support 3W modules
  arm64: dts: uDPU: remove i2c-fast-mode
  arm64: dts: uDPU: fix broken ethernet

Link: https://lore.kernel.org/r/871rs53nu5.fsf@FE-laptopSigned-off-by: Olof Johansson <olof@lixom.net>

mvebu dt for 5.6 (part 1)

 - Add support for SolidRun Clearfog GTR (Armada 385 based board)
 - Move i2c0 to the SoliRrun Microsom dtsi (Armada 38x based)
 - Add EEPROM node on SoliRrun Microsom (rev 2.1)
 - Add EEPROM node on SoliRrun ClearFog Pro

* tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: armada-388-clearfog: add eeprom
  ARM: dts: armada-38x-solidrun-microsom: add eeprom
  ARM: armada-38x-solidrun-microsom: move i2c0 to SOM DT
  ARM: dts: mvebu: add support for SolidRun Clearfog GTR

Link: https://lore.kernel.org/r/874kx13nvh.fsf@FE-laptopSigned-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-5.6-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.6-rc1

These patches do some cleanup to existing nodes, add the memory
subsystem on Tegra186 and Tegra194 as well as the FUSE and APB MISC
nodes on Tegra194. There are also a few additions to the Jetson Nano
device tree to enable additional features and the force recovery
button on the Jetson AGX Xavier now produces a key code that is
actually valid. Finally, an alias is added for the Ethernet card on
Jetson TX2 to allow firmware to find it and pass a MAC address via
device tree.

* tag 'tegra-for-5.6-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Allow bootloader to configure Ethernet MAC on Jetson TX2
  arm64: tegra: Redefine force recovery key on Jetson AGX Xavier
  arm64: tegra: Enable SDIO on Jetson Nano M.2 Key E
  arm64: tegra: Enable PWM fan on Jetson Nano
  arm64: tegra: Add fuse/apbmisc node on Tegra194
  arm64: tegra: Make XUSB node consistent with the rest
  arm64: tegra: Add the memory subsystem on Tegra194
  arm64: tegra: Add external memory controller on Tegra186
  arm64: tegra: Add interrupt for memory controller on Tegra186
  arm64: tegra: Rename EMC on Tegra132
  arm64: tegra: Let the EMC hardware use the EMC clock

Link: https://lore.kernel.org/r/20200111003553.2411874-7-thierry.reding@gmail.comSigned-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.6-rc1

This adds memory timings for the PAZ100 and does some minor cleanup for
the external memory controller device tree node on Tegra124.

* tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: dts: tegra20: paz00: Add memory timings
  ARM: tegra: Rename EMC on Tegra124
  ARM: tegra: Let the EMC hardware use the EMC clock

Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.comSigned-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.6-rc1

This contains a conversion of the Tegra124 EMC bindings to json-schema
as well as the addition of the bindings for the memory subsystem found
on Tegra186 and Tegra194.

* tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: memory: Add Tegra186 memory subsystem
  dt-bindings: memory: Add Tegra194 memory controller header
  dt-bindings: memory: Add Tegra186 memory client IDs
  dt-bindings: memory-controller: Convert Tegra124 EMC to json-schema

Link: https://lore.kernel.org/r/20200111003553.2411874-1-thierry.reding@gmail.comSigned-off-by: Olof Johansson <olof@lixom.net>

The Gateworks GW5912 is an IMX6 SoC based single board computer with:
 - IMX6Q or IMX6DL
 - 32bit DDR3 DRAM
 - GbE RJ45 front-panel
 - 4x miniPCIe socket with PCI Gen2, USB2
 - 1x miniPCIe socket with PCI Gen2, USB2, mSATA
 - 1x miniPCIe socket with PCI Gen2, USB2, mezzanine
 - 10V to 60V DC input barrel jack
 - 3axis accelerometer (lis2de12)
 - GPS (ublox ZOE-M8Q)
 - bi-color front-panel LED
 - 256MB NAND boot device
 - nanoSIM/microSD socket (with UHS-I support)
 - user pushbutton
 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
 - CAN Bus transceiver (mcp2562)
 - RS232 transceiver (1x UART with flow-control or 2x UART (build option)
 - off-board SPI connector (1x chip-select)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The Gateworks GW5913 is an IMX6 SoC based single board computer with:
 - IMX6Q or IMX6DL
 - 32bit DDR3 DRAM
 - FEC GbE RJ45 front-panel
 - 1x miniPCIe socket with PCI Gen2, USB2
 - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
 - 6V to 60V DC input connector
 - GPS (ublox ZOE-M8Q)
 - bi-color front-panel LED
 - 256MB NAND boot device
 - nanoSIM socket
 - user pushbutton
 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The Gateworks GW5910 is an IMX6 SoC based single board computer with:
 - IMX6Q or IMX6DL
 - 32bit DDR3 DRAM
 - FEC GbE RJ45 front-panel
 - 1x miniPCIe socket with PCI Gen2, USB2
 - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
 - 5V to 60V DC input barrel jack
 - 3axis accelerometer (lis2de12)
 - GPS (ublox ZOE-M8Q)
 - bi-color front-panel LED
 - 256MB NAND boot device
 - microSD socket (with UHS-I support)
 - user pushbutton
 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
 - Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6)
 - WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6)
 - RS232 transceiver (1x UART with flow-control or 2x UART (build option)
 - off-board SPI connector (1x chip-select)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Robert Jones <rjones@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The Gateworks GW5907 is an IMX6 SoC based single board computer with:
 - IMX6Q or IMX6DL
 - 32bit DDR3 DRAM
 - FEC GbE Phy
 - bi-color front-panel LED
 - 256MB NAND boot device
 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
 - Digital IO expander (pca9555)
 - Joystick 12bit adc (ads1015)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add the compatible enum entries for Gateworks Ventana boards.
Signed-off-by: Robert Jones <rjones@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Merge tag 'samsung-dt-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.6

1. Couple ARM and wcore bus regulators on Exynos542x so higher
   frequencies could be used with dynamic voltage and frequency scaling.
   Enable this higher frequencies.
2. Correct the polarity of USB3503 hub GPIOs.
3. Adjust the bus frequencies (scaled with devfreq framework) on
   Exynos5422 Odroid boards to match values possible to obtain from root
   PLLs.
4. Add display to Tiny4412 board.
5. Cleanups and minor improvements.

* tag 'samsung-dt-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Enable FIMD node and add proper panel node to Tiny4412
  ARM: dts: samsung: Rename Samsung and Exynos to lowercase
  ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids
  ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS
  ARM: dts: exynos: Correct USB3503 GPIOs polarity
  ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
  ARM: dts: exynos: Add initial data for coupled regulators for Exynos5422/5800
  ARM: dts: exynos: Remove syscon compatible from chipid node on Exynos5

Link: https://lore.kernel.org/r/20200110172334.4767-3-krzk@kernel.orgSigned-off-by: Olof Johansson <olof@lixom.net>

We've created a vendor directory for sprd, so move the board bindings to
there.

Link: https://lore.kernel.org/r/20200110063755.19804-2-zhang.lyra@gmail.comSigned-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.

The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.

Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.

* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
  arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
  arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
  arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
  arm64: dts: rockchip: Add PX30 LVDS
  arm64: dts: rockchip: add dsi controller for px30
  arm64: dts: rockchip: Add PX30 DSI DPHY
  arm64: dts: rockchip: Add RK3328 idle state
  arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
  arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
  ARM: dts: rockchip: Add Radxa Dalang Carrier board
  arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
  dt-bindings: arm: rockchip: Add Rock Pi N10 binding
  arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
  arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
  arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
  arm64: dts: rockchip: enable the gpu on px30-evb
  arm64: dts: rockchip: add the gpu for px30
  dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
  arm64: dts: rockchip: Add GPU cooling device for RK3399
  arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
  ...

Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@philSigned-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Pin-name corrections for Veyron-Fievel, bluetooth for a number of veyron boards and
additional operating points for rk3288-tinker.

* tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger
  ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
  ARM: dts: rockchip: Add missing cpu operating points for rk3288-tinker
  ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron

Link: https://lore.kernel.org/r/8215452.dU6eVM2tAM@philSigned-off-by: Olof Johansson <olof@lixom.net>

This enables the driver for STM32 PWR regulators found on stm32mp1.

Link: https://lore.kernel.org/r/20200109125531.13610-1-alexandre.torgue@st.comSigned-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.6, round 1

Highlights:
----------

MPU part:
 -Add PWM support on DK2 board.
 -Add counter support to STM32 timers.
 -Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
  connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
  extension connector on EV1 & DKx boards.
 -Add ADC support on ED1 board.
 -Update devicetree files split to better fit to STM32MP15 SOC & boards
  diversity.
 -Fix issues seen during YAML validation.
 -Enable Ethernet (MAC) TX clock gating during low-power mode.
 -Enable USB OTG HS support on DKx boards.
 -Enable USB Host EHCI on DKx boards.

MCU part:
 -Fix issues seen during YAML validation.

* tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits)
  ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval
  ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco
  ARM: dts: stm32: change nvmem node name on stm32mp1
  ARM: dts: stm32: change nvmem node name on stm32f429
  ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
  ARM: dts: stm32: fix dma controller node name on stm32mp157c
  ARM: dts: stm32: fix dma controller node name on stm32f743
  ARM: dts: stm32: fix dma controller node name on stm32f746
  ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1
  ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards
  ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx
  ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards
  ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
  ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
  ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
  ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
  ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
  ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups
  ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups
  ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity
  ...

Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.comSigned-off-by: Olof Johansson <olof@lixom.net>

ARM64: DT: Hisilicon SoCs DT updates for 5.6

- Add remote control map name of the IR device for the hi3798cv200 poplar board
- Correct the PCIe bus range setting for the hi3798cv200

* tag 'hisi-arm64-dt-for-5.6' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting
  arm64: dts: hi3798cv200-poplar: add linux,rc-map-name for IR

Link: https://lore.kernel.org/r/5E169EDE.8020809@hisilicon.comSigned-off-by: Olof Johansson <olof@lixom.net>

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.6, please pull the following:

- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
  different than the previous Pi chips

- Florian switches the BCM956265HR board to use the hardware I2C
  controllers for interfacing with the SFPs

* tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcm2711: Enable HWRNG support
  ARM: dts: bcm2835: Move rng definition to common location
  ARM: dts: NSP: Use hardware I2C for BCM958625HR

Link: https://lore.kernel.org/r/20200108191114.15987-1-f.fainelli@gmail.comSigned-off-by: Olof Johansson <olof@lixom.net>

Add an ethernet alias so that a stable MAC address is added to the
device tree for the wired ethernet interface.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The current BTN_1 code associated with the force-recovery key is not a
valid code for EV_KEY type input devices. This causes errors in the
libinput debug-events command.

There is no system level action that maps to the force-recovery key on
Jetson AGX Xavier, so assign it the KEY_SLEEP action, which at least
makes it do something marginally useful.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Enable SDMMC3 and set it up for SDIO devices.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Enable PWM fan and extend CPU thermal zones for monitoring and fan control.
This will trigger the PWM fan on J15 and cool down the system if necessary.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>

PAZ00 board has two variants of DDR2 SDRAM devices for External Memory:
one is Hynix HY5PS1G831CLFP-Y5 and the other is Micron MT47H128M8CF-25:H.
The Micron variant doesn't have official timings in the wild, hence only
timings for the Hynix are added. The memory frequency-scaling was tested
using the Tegra20 devfreq driver.
Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

This commit adds Tegra194 fuse and apbmisc device nodes.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The ordering of properties in the XUSB node is inconsistent with the
ordering of the properties in other nodes. Resort them to make the node
more consistent. Also get rid of some unnecessary whitespace.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The memory subsystem on Tegra194 encompasses both the memory and
external memory controllers. The EMC is represented as a subnode of the
MC and a ranges property is used to describe the register ranges.

A dma-ranges property is also added to describe that all memory clients
can address up to 39 bits using the memory controller client interface
(MCCIF), unless otherwise limited by the DMA engines of the hardware. A
memory client can technically use 40 bits of addresses, but the memory
controller on Tegra194 uses bit 39 to determine the XBAR format used to
access memory. Use of this bit needs to be explicitly controlled by the
operating system drivers for devices that can use this on-the-fly format
conversion. Using the dma-ranges property prevents the operating system
from using the bit implicitly, for example in I/O virtual address
mappings.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the external memory controller as a child device of the memory
controller on Tegra186. The memory controller really represents the
memory subsystem that encompasses both the memory and external memory
controllers. The external memory controller uses the BPMP to obtain the
list of supported EMC frequencies and set the EMC frequency.

Also set up the dma-ranges property to describe that all memory clients
can address up to 40 bits using the memory controller client interface
(MCCIF), unless otherwise limited by the DMA engines of the hardware.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The memory controller can be interrupted by certain conditions. Add the
interrupt to the device tree node to allow drivers to trap these
conditions.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The NVIDIA Tegra186 SoC contains a memory subsystem composed of the
memory controller and the external memory controller. The memory
controller provides interfaces for the memory clients to access the
memory. Accesses can be either bounced through the SMMU for IOVA
translation or directly to the EMC.

The bulk of the programming of the external memory controller happens
through interfaces exposed by the BPMP. Describe this relationship by
adding a phandle reference to the BPMP to the EMC node.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>

This header contains definitions for the memory controller found on
NVIDIA Tegra194 SoCs, such as the stream IDs used for the ARM SMMU and
the IDs used to identify the various memory clients.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>

Add IDs for the memory clients found on NVIDIA Tegra186 SoCs. This will
be used to describe interconnect paths from devices to system memory.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>

Rename the EMC node to external-memory-controller according to device
tree best practices.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Rename the EMC node to external-memory-controller according to device
tree best practices.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The EMC hardware block needs access to the EMC clock in order to scale
the external memory frequency. Add the clocks property so that drivers
for the EMC can acquire a reference to the EMC clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The EMC hardware block needs access to the EMC clock in order to scale
the external memory frequency. Add the clocks property so that drivers
for the EMC can acquire a reference to the EMC clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the device tree bindings for the Tegra124 EMC controller to the
DT schema format using json-schema. While at it, clean up the binding a
little bit by removing any mention of how RAM code and clock frequency
are represented in unit-addresses (which they aren't) and by adding the
EMC clock without which the EMC controller can't change the frequency at
which the external memory is clocked. While this is technically an ABI
break (the clock was not required before), this should be fine because
there isn't much that the EMC driver can do without access to the EMC
clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>

Add a fixed regulator and use it as power supply for RBG panel.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>