- 09 Jul, 2020 2 commits
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Ville Syrjälä authored
Apparently EDIDs with multiple DispID ext blocks is a thing, so prepare for iterating through multiple ext blocks of the same type by passing the starting ext block index to drm_find_edid_extension(). Well also have drm_find_edid_extension() update the index to point to the next ext block on success. Thus we should be able to call drm_find_edid_extension() in loop. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200527130310.27099-1-ville.syrjala@linux.intel.comReviewed-by:
José Roberto de Souza <jose.souza@intel.com>
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Ville Syrjälä authored
To make it easier to figure out what caused a particular debug message let's print out aux->name. v2: Convert drm_dp_send_real_edid_checksum() too Cc: Sam Ravnborg <sam@ravnborg.org> Signed-off-by:
Sam Ravnborg <sam@ravnborg.org>
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- 08 Jul, 2020 3 commits
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Chris Wilson authored
drm_gem_dumb_map_offset() now exists and does everything vgem_gem_dump_map does and *ought* to do. In particular, vgem_gem_dumb_map() was trying to reject mmapping an imported dmabuf by checking the existence of obj->filp. Unfortunately, we always allocated an obj->filp, even if unused for an imported dmabuf. Instead, the drm_gem_dumb_map_offset(), since commit 90378e58 ("drm/gem: drm_gem_dumb_map_offset(): reject dma-buf"), uses the obj->import_attach to reject such invalid mmaps. This prevents vgem from allowing userspace mmapping the dumb handle and attempting to incorrectly fault in remote pages belonging to another device, where there may not even be a struct page. v2: Use the default drm_gem_dumb_map_offset() callback Fixes: af33a919 ("drm/vgem: Enable dmabuf import interfaces") Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Cc: <stable@vger.kernel.org> # v4.13+ Link: https://patchwork.freedesktop.org/patch/msgid/20200708154911.21236-1-chris@chris-wilson.co.uk
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Marek Vasut authored
Add missing pm_runtime_get_sync() into ltdc_crtc_atomic_enable() to match pm_runtime_put_sync() in ltdc_crtc_atomic_disable(), otherwise the LTDC might suspend via runtime PM, disable clock, and then fail to resume later on. The test which triggers it is roughly -- run qt5 application which uses eglfs platform and etnaviv, stop the application, sleep for 15 minutes, run the application again. This leads to a timeout waiting for vsync, because the LTDC has suspended, but did not resume. Fixes: 35ab6cfb ("drm/stm: support runtime power management") Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Yannick Fertré <yannick.fertre@st.com> Cc: Philippe Cornu <philippe.cornu@st.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> To: dri-devel@lists.freedesktop.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org Acked-by:
Philippe Cornu <philippe.cornu@st.com> Tested-by:
Yannick Fertre <yannick.fertre@st.com> Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200229221649.90813-1-marex@denx.de
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Yannick Fertre authored
It is not necessary to suspend or stop the ltdc clocks to modify the pixel clock. Signed-off-by:
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- 07 Jul, 2020 25 commits
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Neil Armstrong authored
The recent GCC compiler is very picky with the VD_H_START() and AFBC_DEC_PIXEL_BGN_H() macros, triggering a runtime assert error as: In function 'meson_overlay_setup_scaler_params', inlined from 'meson_overlay_atomic_update' at drivers/gpu/drm/meson/meson_overlay.c:542:2: ./include/linux/compiler.h:392:38: error: call to '__compiletime_assert_341' declared with attribute error: FIELD_PREP: value too large for the field drivers/gpu/drm/meson/meson_overlay.c:413:4: note: in expansion of macro 'AFBC_DEC_PIXEL_BGN_H' 413 | AFBC_DEC_PIXEL_BGN_H(hd_start_lines - afbc_left) | | ^~~~~~~~~~~~~~~~~~~~ ./include/linux/compiler.h:392:38: error: call to '__compiletime_assert_401' declared with attribute error: FIELD_PREP: value too large for the field It's not expected to overflow these fields, but the compiler did find a case where it overflows. We can safely ignore this, so mask the value with the field width. Fixes: e860785d ("drm/meson: overlay: setup overlay for Amlogic FBC") Signed-off-by:Neil Armstrong <narmstrong@baylibre.com> Acked-by:
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Thomas Zimmermann authored
There's modesetting init code in ast_main.c. Move it to ast_mode.c and merge it with the modesetting init code in ast_mode_init(). The result is ast_mode_config_init(), which initalizes the whole modesetting. Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Acked-by:
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Thomas Zimmermann authored
Using drmm_mode_config_init() sets up managed release of modesetting resources. The existing modesetting's finalizer is empty, so remove it. Signed-off-by:
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Thomas Zimmermann authored
Struct ast_crtc has been cleaned up and it's now a wrapper around the DRM CRTC structure struct drm_crtc. This patch converts the driver to struct drm_crtc and removes struct ast_crtc. Signed-off-by:
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Thomas Zimmermann authored
The cursor helpers reserve buffer objects in VRAM and update their content. So although tied to modesetting, cursor helpers are more of a memory manager. The modesetting's cursor plane requires this functionality, so initialize cursors before modesetting. While at it, also add an error check for ast_cursor_init(). Signed-off-by:
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Thomas Zimmermann authored
Register a release function to finalize cursors. The _fini() function gets un-exported from the source file. The function ast_mode_fini() is now empty and will be removed by a later patch. Signed-off-by:
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Thomas Zimmermann authored
Updating the image in a cursor's HW BO requires a mapping of the BO's buffer in the kernel's address space. Cursor image updates can happen frequently and create CPU overhead. As cursor HW BOs are small and never move, they are now map exactly once during the initialization and the mapping is used throughout the driver's lifetime. This change also removes a possible source of failures from ast_cursor_show(). As the helper does not establish mappings, it cannot fail. As a result, the cursor plane's atomic-update helper does not call any failable interfaces. All failures are detected before trying to update the cursor plane. Signed-off-by:
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Thomas Zimmermann authored
As the inverse to ast_cursor_show(), ast_cursor_hide() disables the HW cursor. Signed-off-by:
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Thomas Zimmermann authored
The ast_cursor_show() helper enables the cursor to be displayed. No need to repeat that operation in the plane's atomic-update function. Signed-off-by:
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Thomas Zimmermann authored
Having a cursor move function is misleading, as it actually enables the cursor's image for displaying. So rename it to ast_cursor_show(). It's semantics is to show a cursor at the specified location on the screen. The displayed cursor is always the image in the cursor front BO. This change also simplifies struct ast_crtc to being a mere wrapper around around struct drm_crtc. It will be removed by a later patch. Signed-off-by:
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Thomas Zimmermann authored
The new helper ast_cursor_page_flip() switches the cursor's front and back BOs. This simplifies the cursor plane's update helper. Signed-off-by:
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Thomas Zimmermann authored
Cursor image and checksum go hand in hand. Update both in the same place. The helper cannot fail, so remove the return type. Signed-off-by:
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Thomas Zimmermann authored
The new helper ast_cursor_blit() updates a cursor's backbuffer HW BO from a framebuffer structure. The cursor plane's prepare_fb() function now uses the new interface. Pinning and mapping of BOs is done automatically by the helper. This includes the source BO, which was not pinned by the original code in prepare_fb(). Signed-off-by:
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Thomas Zimmermann authored
Removes some typecasting. v2: * use to_ast_private() instead of struct drm_device.dev_private Signed-off-by:
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Thomas Zimmermann authored
The cursor manipulation functions are unrelated to modesetting. Move them into their own file. Signed-off-by:
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Maxime Ripard authored
Now that the code in vc4_crtc accessing registers is only meant for the pixelvalve, it doesn't make sense anymore to test whether we're accessing the TXP or not and we can safely remove those checks. Signed-off-by:
Maxime Ripard <maxime@cerno.tech> Reviewed-by:
Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/c044daba470fcb1cb57e3d34d88f75325b2ebbab.1591882579.git-series.maxime@cerno.tech
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Maxime Ripard authored
The TXP so far has been leveraging the PixelValve infrastructure in the driver, that was really two things: the interaction with DRM's CRTC concept, the setup of the underlying pixelvalve and the setup of the shared HVS, the pixelvalve part being irrelevant to the TXP since it accesses the HVS directly. Now that we have a clear separation between the three parts, we can represent the TXP as a CRTC of its own, leveraging the common CRTC and HVS code, but leaving aside the pixelvalve setup. Signed-off-by:
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Maxime Ripard authored
The TXP driver is the only place where we need to set the txp_armed flag, so let's move the function in the TXP driver. Signed-off-by:
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Maxime Ripard authored
The upcoming patches to turn the TXP into a full-blown CRTC will have the same CRTC initialisation code, so let's move it into a separate, public, function so that we can reuse it later on. Signed-off-by:
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Maxime Ripard authored
The CRTC hooks are called both for the TXP and the pixelvalve, yet some will read / write the registers as if the device was a pixelvalve, which won't really work. Let's make sure we only access those registers if we are running on a PixelValve. Signed-off-by:
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Maxime Ripard authored
The vc4_crtc_data structure is currently storing data related to both the general CRTC information needed by the rest of the vc4 driver (like HVS output and available FIFOs) and some related to the pixelvalve attached to that CRTC. Let's split this into two structures so that we can reuse the CRTC part into the TXP later on. Signed-off-by:
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Maxime Ripard authored
We'll need the CRTC state related functions to be exported so that we can reuse them for the TXP. Signed-off-by:
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Maxime Ripard authored
The CRTC in vc4 is backed by two devices, the HVS that does the composition and the PixelValve that does the timing generation. The writeback is kind of a special case since it doesn't have an associated pixelvalve but goes straight from the HVS to the TXP. Therefore, it makes sense to move out the HVS setup code into helpers so that we can also reuse them from the TXP driver. Signed-off-by:
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Maxime Ripard authored
We'll need the HVS to be bound before the TXP for the upcoming reworks, but it needs to happen before the PV are bound so that the code to set the possible_crtcs field works properly on the TXP. Move it right between the two devices. Signed-off-by:
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Maxime Ripard authored
The VC4_SET_FIELD and VC4_GET_FIELD are reimplementing most of the logic already defined in FIELD_SET and FIELD_GET. Let's convert the vc4 macros to use the FIELD_* macros. Signed-off-by:
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- 06 Jul, 2020 2 commits
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Brian Starkey authored
In cases such as DRM_FORMAT_MOD_SAMSUNG_16_16_TILE, the modifier describes a generic pixel re-ordering which can be applicable to multiple vendors. Define an alias: DRM_FORMAT_MOD_GENERIC_16_16_TILE, which can be used to describe this layout in a vendor-neutral way, and add a comment about the expected usage of such "generic" modifiers. Changes in v2: - Move note about future cases to comment (Daniel) Signed-off-by:
Brian Starkey <brian.starkey@arm.com> Reviewed-by:
Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200626164800.11595-1-brian.starkey@arm.com
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Tian Tao authored
code refactoring for hibmc_drv_vdac.c, no actual function changes. v2: remove the debug message. v3: embedding connector and encoder in struct hibmc_drm_private. Signed-off-by:
Tian Tao <tiantao6@hisilicon.com> Reviewed-by:
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- 03 Jul, 2020 6 commits
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Neil Armstrong authored
Since the VD1 Amlogic FBC decoder is now configured by the overlay driver, commit the right registers to decode the Amlogic FBC frame. Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Reviewed-by:
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Neil Armstrong authored
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use read the FBC header as Scatter Memory layout reference. Signed-off-by:
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Neil Armstrong authored
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use a different superblock size for the Memory Saving mode. Signed-off-by:
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Neil Armstrong authored
Setup the Amlogic FBC decoder for the VD1 video overlay plane. The VD1 Amlogic FBC decoder is integrated in the pipeline like the YUV pixel reading/formatter but used a direct memory address instead. This adds support for the basic layout, and needs to calculate the content body size since the header is allocated after. Signed-off-by:
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Neil Armstrong authored
Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing register. Signed-off-by:
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Neil Armstrong authored
Amlogic uses a proprietary lossless image compression protocol and format for their hardware video codec accelerators, either video decoders or video input encoders. It considerably reduces memory bandwidth while writing and reading frames in memory. The underlying storage is considered to be 3 components, 8bit or 10-bit per component, YCbCr 420, single plane : - DRM_FORMAT_YUV420_8BIT - DRM_FORMAT_YUV420_10BIT This modifier will be notably added to DMA-BUF frames imported from the V4L2 Amlogic VDEC decoder. This introduces the basic layout composed of: - a body content organized in 64x32 superblocks with 4096 bytes per superblock in default mode. - a 32 bytes per 128x64 header block This layout is tranferrable between Amlogic SoCs supporting this modifier. The Memory Saving option exist changing the layout superblock size to save memory when using 8bit components pixels size. Finally is also adds the Scatter Memory layout, meaning the header contains IOMMU references to the compressed frames content to optimize memory access and layout. In this mode, only the header memory address is needed, thus the content memory organization is tied to the current producer execution and cannot be saved/dumped neither transferrable between Amlogic SoCs supporting this modifier. Signed-off-by:
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- 02 Jul, 2020 2 commits
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Rob Herring authored
Convert the analog TV, DVI, HDMI, and VGA connector bindings to DT schema format. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Maxime Ripard <mripard@kernel.org> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200630200216.1172566-1-robh@kernel.org
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Daniel Vetter authored
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. v2: Compile fix. Oops. Reviewed-by:
Roland Scheidegger <sroland@vmware.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Cc: VMware Graphics <linux-graphics-maintainer@vmware.com> Cc: Roland Scheidegger <sroland@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200612204940.2134653-1-daniel.vetter@ffwll.ch Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-7-daniel.vetter@ffwll.ch
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