- 21 Jun, 2019 12 commits
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Hawking Zhang authored
vram_type is saved in member vram_module[0].memory_type Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Jack Xiao <Jack.Xiao@amd.com> Signed-off-by:
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Hawking Zhang authored
A pm4 header for Navi. PM4 is the packet format used by the compute and gfx engines. Signed-off-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Hawking Zhang authored
Defines the SDMA packet formats. Signed-off-by:
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Huang Rui authored
Clear state for gfx pipe. v2: squash in updates Signed-off-by:
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Huang Rui authored
Header for CP structures (MQD, etc.) V2: squash in updates Signed-off-by:
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Hawking Zhang authored
Parse the new parameters for gfx10. Signed-off-by:
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Hawking Zhang authored
two new members that specific for navi10 are included in v2_0: num_sc_per_sh and num_packer_per_sc Signed-off-by:
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Huang Rui authored
gpu info firmware stores configuration data for various IP blocks. Signed-off-by:
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Hawking Zhang authored
New gfx config parameter. Signed-off-by:
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Hawking Zhang authored
The two members are used to cache the values from gpu_info fw accordingly Signed-off-by:
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Hawking Zhang authored
For printing vram type. Signed-off-by:
Tao Zhou <Tao.Zhou1@amd.com> Signed-off-by:
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Huang Rui authored
New vram type. Signed-off-by:
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- 20 Jun, 2019 28 commits
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Huang Rui authored
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Huang Rui authored
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Hawking Zhang authored
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Hawking Zhang authored
Update mappings for Navi10. Signed-off-by:
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Hawking Zhang authored
Updated tables for Navi10. Signed-off-by:
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
v2: Update regs (Alex) v3: More updates (Alex) v4: more updates (Alex) Signed-off-by:
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Hawking Zhang authored
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Alex Deucher authored
This reverts commit 6e5155ae. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Alex Deucher authored
This reverts commit 1760bd06. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Alex Deucher authored
This reverts commit 7cd4b700. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Alex Deucher authored
This reverts commit 11cd74cd. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Alex Deucher authored
This reverts commit 9ed43ef8. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Alex Deucher authored
This reverts commit a1651530. Revert this to apply the version that includes DCN2 support. Signed-off-by:
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Nicholas Kazlauskas authored
This reverts commit ebc8c6f18322ad54275997a888ca1731d74b711f. There are still missing corner cases with cursor interaction and these fast plane updates on Picasso and Raven2 leading to endless PSTATE warnings for typical desktop usage depending on the userspace. This change should be reverted until these issues have been resolved. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110949Signed-off-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by:
David Francis <david.francis@amd.com> Signed-off-by:
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Jack Zhang authored
Tonga sriov need to use smu to load firmware. Remove sriov flag because the default return value is zero. Signed-off-by:
Jack Zhang <Jack.Zhang1@amd.com> Reviewed-by:
Trigger Huang <Trigger.Huang@amd.com> Signed-off-by:
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Jonathan Kim authored
adding perf event counters Signed-off-by:
Jonathan Kim <Jonathan.Kim@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Jonathan Kim authored
add pmu attribute groups and structures for perf events. add sysfs to track available df perfmon counters fix overflow handling in perfmon counter reads. v2: squash in fix (Alex) Signed-off-by:
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Roman Li authored
[Why] After clkmgr rework it gets initialized after resource pool. The clkmgr is used in resource pool init for xgmi path. That causes driver crash on Vega20 with xgmi due to NULL deref. [How] Move xgmi compensation code to dce121_clk_mgr_construct() That also allows to make dce121_clock_patch_xgmi_ss_info() internal static function. Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
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