Merge tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

ARM: Keystone DTS update for 4.11

Brief:
	- MSM RAM node support for the Keystone 2 SOCs.
	- PSC node & reset controller node support for keystone 2 SOCs.
	- da830 UART node support.

* tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone-k2e: Add PSC reset controller node
  ARM: dts: keystone-k2l: Add PSC reset controller node
  ARM: dts: keystone-k2hk: Add PSC reset controller node
  ARM: dts: keystone: Add PSC node
  ARM: keystone: dts: fix netcp clocks and add names
  ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2g: Add MSM RAM node
  ARM: dts: keystone-k2e: Add MSM RAM node
  ARM: dts: keystone-k2l: Add MSM RAM node
  ARM: dts: keystone-k2hk: Add MSM RAM node
  ARM: dts: keystone: Add "ti,da830-uart" compatible string
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Bit of cleanup for the cortex-a9 uarts to have that soc-specific
spare-compatible as all others have, conversion to gpio constants
and addition of rk3288 qos nodes that need to be saved before a
power-domain gets turned off.

* tag 'v4.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188
  ARM: dts: rockchip: use pin constants to describe gpios
  ARM: dts: rockchip: add qos node for rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>

This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.11,
please pull the following changes:

- Rafal enables the UART by default on all BCM5301x, BCM4708, BCM4709 since
  every device found out there has it enabled by default. He also fixes the
  LED definitions for the Luxul XWR-3100 device, enables USB controllers and
  their respective PHY devices, specifies the correct GPIO to power on USB
  HUBs, adds the additional RAM bank for somes devices, and finally sets the
  correct 5Ghz frequency limits on the Netgear R8000

- Jon does a number of Norsthar Plus SoC cleanups, fixes NAND partitions unit
  addresses, adds QSPI support to a bunch of boards, adds Ethernet switch ports
  to the BCM958625K reference board, enables 3rd Ethernet MAC instance to
  relevant DTSes, enables Ethernet on the XMC board, and finally adds SD/MMC
  support to the XMC board

- Boris adds the Video Encoder nodes to the Raspberry Pi DTS include files
  ands enables it on the relevant boards

- Dan adds support for two new Luxul devices: XAP-1410 and XWR-1200, both
  BCM47081 based SoCs

* tag 'arm-soc/for-4.11/devicetree' of http://github.com/Broadcom/stblinux:
  ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
  ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
  ARM: dts: BCM5301X: Add DT for Luxul XWR-1200
  ARM: dts: BCM5301X: Add DT for Luxul XAP-1410
  ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
  ARM: dts: NSP: Add SD/MMC support
  ARM: dts: NSP: Add Ethernet to NSP XMC
  ARM: dts: NSP: Add and enable amac2
  ARM: dts: NSP: Add BCM958625K switch ports
  ARM: dts: NSP: Add QSPI support to missing boards
  ARM: dts: NSP: Correct NAND partition unit address
  ARM: dts: NSP: DT Clean-ups
  ARM: dts: BCM53573: Specify USB ports of on-SoC controllers
  ARM: dts: BCM5301X: Specify all RAM by including an extra block
  ARM: dts: BCM5301X: Set GPIO enabling USB power on Netgear R7000
  ARM: dts: BCM5301X: Specify USB controllers in DT
  ARM: dts: BCM5301X: Fix LAN LED labels for Luxul XWR-3100
  ARM: dts: BCM5301X: Enable UART by default for BCM4708(1), BCM4709(4) & BCM53012
Signed-off-by: Olof Johansson <olof@lixom.net>

Tango4 provides 2 USB 2.0 controllers.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Tango4 provides 2 SD/SDIO/eMMC controllers.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

http://elinux.org/Device_Tree_Usage#aliases_NodeSigned-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2L SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2H SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

The Power Sleep Controller (PSC) module is responsible
for the power and clock management for each of the peripherals
present on the SoC. Represent this as a syscon node so that
multiple users can leverage it for various functionalities.
Signed-off-by: Suman Anna <s-anna@ti.com>
[afd@ti.com: add simple-mfd compatible]
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

Fix the pa clock to point to the clkpa which has clock rate of 1/3 of PA
PLL clock and add clock names.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

The serial IPs in Rockchip socs are based on Designware uarts and thus
bind against the snps,dw-apb-uart compatible.
On all newer socs we also carry around per-soc compatibles that allow
us to have more specific drivers in the future - if needed.

The cortex-a9 socs rk3066 and rk3188 that were added first don't have
those yet, so add them for completenes sake.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This pull request brings in the DT changes for VEC (TV-out) on
Raspberry Pi.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Luxul XWR-1200 in a dual-band router based on BCM47081. It uses serial
flash (for bootloader and NVRAM) and NAND flash (for firmware).
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Luxul XAP-1410 in a dual-band access point device based on BCM47081 with
serial flash. It has 3 LEDs and just one (reset) button.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets
two of them for 5 GHz band. Both seem the same and their firmwares
report the same set of channels. The problem is due to hardware / board
design there are extra limitations that should be respected.

First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be
used for U-NII-1. Using them in a different way may result in wireless
not working or in noticeably reduced performance. Basic version of this
info was provided by Broadcom employee, then it has been verified by me
using original vendor firmware (which has limitations hardcoded in UI).

This patch uses recently introduced ieee80211-freq-limit property to
describe these limitations at DT level.

Referencing PCIe devices in DT required specifying all related bridges.
Below you can see (a bit complex) PCI tree from R8000 that explains all
entries that I needed to put in DT.

0000:00:00.0		14e4:8012	Bridge Device
└─ 0000:01:00.0		14e4:aa52	Network Controller

0001:00:00.0		14e4:8012	Bridge Device
└─ 0001:01:00.0		10b5:8603	Bridge Device
   ├─ 0001:02:01.0	10b5:8603	Bridge Device
   │  └─ 0001:03:00.0	14e4:aa52	Network Controller
   ├─ 0001:02:02.0	10b5:8603	Bridge Device
   │  └─ 0001:04:00.0	14e4:aa52	Network Controller
   ├─ 0001:02:03.0	000d:0000	0x000000
   ├─ 0001:02:04.0	000d:0000	0x000000
   ├─ 0001:02:05.0	000d:0000	0x000000
   ├─ 0001:02:06.0	000d:0000	0x000000
   ├─ (...)
   ├─ 0001:02:1d.0	000d:0000	0x000000
   ├─ 0001:02:1e.0	000d:0000	0x000000
   └─ 0001:02:1f.0	000d:0000	0x000000
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Add SD/MMC support to the Broadcom NSP SVK and XMC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Enable the ethernet in the NSP XMC (bcm958525xmc) device tree
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Add and enable the third AMAC ethernet interface in the device trees for
the platforms where it is present.  Also, enable amac1 on some of the
platforms where that was missing.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Add the layout of the switch ports found on the BCM958625K reference
board. The CPU port is hooked up to the AMAC0 Ethernet controller
adapter.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

QSPI device tree entries are present in bcm958625k, but missing from
bcm958522er, bcm958525er, bcm958525xmc, bcm958622hr, bcm958623hr,
bcm958625hr, and bcm988312hr.  Duplicate the entry in bcm958625k for
all of those that are missing it (as they are identical).
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

The NAND partition unit address does not match the other NSP device tree
files.  This change makes them uniform.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in.  Move it to make it fit in properly.  Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files.  Move the relevant
peices to make it match.  Finally, remove errant new lines.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

The first 128 MiB of RAM can be accessed using an alias at address 0x0.

In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)

So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

There is one GPIO controlling power for both USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

There are 3 separated controllers, one per USB /standard/. With PHY
drivers in place they can be simply supported with generic drivers.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

They were named incorrectly most likely due to copy & paste mistake.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Every device tested so far got UART0 (at 0x18000300) working as serial
console. It's most likely part of reference design and all vendors use
it that way.

It seems to be easier to enable it by default and just disable it if we
ever see a device with different hardware design.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Merge tag 'aspeed-4.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt

Aspeed devicetree updates for 4.11

This introduces the first OpenPower Power9 BMC system, Romulus. Romulus is
based on the ast2500 SoC from Aspeed.

These commits also add newly upstreamed drivers to the Palmetto BMC and ast2500
eval board. We now have working network, ipmi bt, gpio and pinmux on all platforms.

* tag 'aspeed-4.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: Add Romulus BMC platform
  ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
  ARM: dts: aspeed: Correct palmetto device tree
  ARM: dts: aspeed: Reserve framebuffer memory
  ARM: dts: aspeed-g5: Add gpio controller to devicetree
  ARM: dts: aspeed-g5: Add syscon and pin controller nodes
  ARM: dts: aspeed-g5: Add LPC Controller node
  ARM: dts: aspeed-g5: Add SoC Display Controller node
  ARM: dts: aspeed-g4: Add gpio controller to devicetree
  ARM: dts: aspeed-g4: Add syscon and pin controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'at91-ab-4.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

DT for 4.11:

 - New boards: Axentia TSE-850, sama5d36ek CMP
 - new device definitions for sama5d2
 - Fix DMA allocation on sama5d4 for secure peripherals

* tag 'at91-ab-4.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: dts: at91: add devicetree for the Axentia TSE-850
  ARM: dts: at91: add dts file for sama5d36ek CMP board
  ARM: dts: at91: sama5d2: add ssc0 definition
  ARM: dts: at91: sama5d2 Xplained: use DMA for UART3
  ARM: dts: at91: sama5d2: move UART3 to DMA1
  ARM: dts: at91: add dma1 definition to sama5d2
  ARM: dts: at91: sama5d4 Xplained: enable UART1 node with DMA
  ARM: dts: at91: sama5d4: change DMA allocation for secure peripherals
  ARM: dts: at91: sama5d3_uart: fix reg sizes to match documentation
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.11, round 1.

Highlights:
----------

 - ADD RTC support on STM32F429 MCU
 - Enable RTC on STM32F469and STM32F429 boards
 - ADD ADC support on STM32F429 MCU
 - Enable ADC on STM32F429 Eval board
 - Add I2S external clock
 - Fix memory size for STM32F429 Disco

Note:
-----
First patch "clk: stm32f4: Update DT bindings documentation")
has already been merged in clock tree.

* tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: enable RTC on stm32429i-eval
  ARM: dts: stm32: enable RTC on stm32f469-disco
  ARM: dts: stm32: enable RTC on stm32f429-disco
  ARM: dts: stm32: Add RTC support for STM32F429 MCU
  ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
  ARM: dts: stm32: Include auxiliary stm32fx clock definition
  ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
  ARM: dts: stm32: enable ADC on stm32f429i-eval board
  ARM: dts: stm32: Add ADC support to stm32f429
  ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
  ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
  clk: stm32f4: Update DT bindings documentation
Signed-off-by: Olof Johansson <olof@lixom.net>

mvebu dt for 4.11 (part 1)

- Add support for the ethernet switch on the Turris Omnia board
- Clean up and improvement for ClearFog boards
- Correct license text which was mangled when switching to dual license

* tag 'mvebu-dt-4.11-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: turris-omnia: add support for ethernet switch
  ARM: dts: armada388-clearfog: move uart nodes
  ARM: dts: armada388-clearfog: move ethernet related nodes
  ARM: dts: armada388-clearfog: move I2C nodes
  ARM: dts: armada388-clearfog: move device specific pinctrl nodes
  ARM: dts: armada388-clearfog: add pro model DTS file
  ARM: dts: armada388-clearfog: add base model DTS file
  ARM: dts: armada388-clearfog: move rear button
  ARM: dts: armada388-clearfog: move SPI CS1
  ARM: dts: armada388-clearfog: move second PCIe port
  ARM: dts: armada388-clearfog: move DSA switch
  ARM: dts: armada388-clearfog: split clearfog DTS file
  ARM: dts: armada388-clearfog: move sdhci pinctrl node to microsom
  ARM: dts: armada388-clearfog: move SPI flash into microsom
  ARM: dts: armada388-clearfog: fix SPI flash #size-cells
  ARM: dts: mvebu: Correct license text
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'samsung-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Samsung DeviceTree update for v4.11:
1. Fixes for initial audio clocks configuration.
2. Enable sound on Odroid-X board.
3. Enable DMA for UART modules on Exynos5 SoCs.
4. Add CPU OPPs for Exynos4412 Prime (newer version of Exynos4412). This pulls
   necessary change in the clocks.
5. Remove Exynos4212. We do not have any mainline boards with it. This will
   simplify few bits later.

* tag 'samsung-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: remove Exynos4212 support (dead code)
  ARM: dts: exynos: Add CPU OPPs for Exynos4412 Prime
  clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
  ARM: dts: exynos: Enable DMA support for UART modules on Exynos5 SoCs
  ARM: dts: exynos: Cleanup Odroid-X2 and enable sound on Odroid-X
  ARM: dts: exynos: Fix initial audio clocks configuration on Exynos4 boards
  ARM: dts: exynos: Correct clocks for Exynos4 I2S module
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'sti-dt-for-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt

STi dts update:

Enable High Quality Video Data Plane (HQVDP) DT entry
Add DELTA V4L2 video decoder DT entry
Disable unused fdma instances
Fix sti-display-subsystem wrong clock parent's value
Cleanup and update DT entries related to remoteproc

* tag 'sti-dt-for-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: dts: STiH407-family: Supply Mailbox properties to delta RProc
  ARM: dts: STiH407-family: Supply mailbox properties to GP0 RProc
  ARM: dts: STiH407-family: update dmu remoteproc node
  ARM: dts: STiH407-family: remove gp1 remoteproc node
  ARM: dts: STiH407-family: remove audio remoteproc node
  ARM: dts: STiH407-family: update gp0_reserved memory region
  ARM: dts: STiH410-family: fix wrong parent clock frequency
  ARM: dts: STiH410: add DELTA dt node
  ARM: dts: STiH407-family: disable fdma1 and fdma2
  ARM: dts: STiH410: add hqvdp node
  ARM: dts: STiH410-B2120: enable sti-hda at board level
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'socfpga_dts_for_v4.11_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS updates for v4.11, part 1
- Adds FPGA manager bits
- Enable I2C on Cyclone5 and Arria5 devkits
- Adds LED support on C5/A5 devkits
- Enables CAN on C5 devkit
- Enables watchdog
- Add NAND on Arria10
- Add the LTC2977 Power Monitor on Arria10 devkit

* tag 'socfpga_dts_for_v4.11_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: add missing compatible string for SDRAM controller
  ARM: dts: socfpga: add fpga region support on Arria10
  ARM: dts: socfpga: add base fpga region and fpga bridges
  ARM: dts: socfpga: fpga manager data is 32 bits
  ARM: dts: socfpga: Add NAND device tree for Arria10
  ARM: dts: socfpga: add fpga-manager node for Arria10
  ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit
  ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10
  ARM: dts: socfpga: enable CAN on Cyclone5 devkit
  ARM: dts: socfpga: Add Rohm DH2228FV DAC
  ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkits
  ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch enables RTC on stm32429i-eval with default LSE clock source.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>

This patch enables RTC on stm32f469-disco with default LSE clock source.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>