- 08 Jul, 2017 2 commits
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Brian Norris authored
From Cyrille: """ This pull request contains the following notable changes: - introduce support to the SPI 1-2-2 and 1-4-4 protocols. - introduce support to the Double Data Rate (DDR) mode. - introduce support to the Octo SPI protocols. - add support to new memory parts for Spansion, Macronix and Winbond. - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers. - clean up the st_spi_fsm driver. """
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Boris Brezillon authored
The code checks that ->_point is not NULL, but we should actually check ->_unpoint value which is dereferenced a few lines after the check. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 27 Jun, 2017 2 commits
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Cyrille Pitchen authored
The 35h instruction op code has two aliases/macro definitions: - SPINOR_OP_RDCR from include/linux/mtd/spi-nor.h - SPINOR_OP_RDSR2 from drivers/mtd/devices/serial_flash_cmds.h Actually, some manufacturers name the associated internal register Status Register 2 whereas other manufacturers name it Configuration Register hence the two different macros for the very same instruction op code. Since the spi-nor.h file is the reference file for all SPI NOR instruction op codes, this patch removes the definition of the SPINOR_OP_RDSR2 macro. Also the SPINOR_OP_RDSR2 macro will be associated to another instruction op code in a further patch so we need to avoid a conflict defining this macro twice. Indeed the JESD216 rev B specification, defining the SFDP tables, also refers to the 3Eh and 3Fh instruction op codes to write/read the Status Register 2 on some SPI NOR flash memories, the 35h op code still being used to read the Configuration Register/Status Register 2 on other memories. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
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Arnd Bergmann authored
The variable was already marked 'const' before the previous patch, but the qualifier was in an unusual place, and now the extra 'const' causes a harmless warning: drivers/mtd/spi-nor/cadence-quadspi.c:1286:34: error: duplicate 'const' declaration specifier [-Werror=duplicate-decl-specifier] This removes the other 'const' instead. Fixes: f993c123 ("mtd: spi-nor: cqspi: make of_device_ids const") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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- 26 Jun, 2017 2 commits
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Harry Chou authored
It's an 8 MiB flash with 4 KiB erase sectors. Signed-off-by: Harry Chou <HarryYC.Chou@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Alexander Sverdlin authored
This chip supports stateless 4-byte opcodes, dual and quad read and uniform 4K-byte erase. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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- 23 Jun, 2017 2 commits
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Brian Norris authored
Some recent patches caused churn around this area, and checkpatch noticed the existing issues. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
This fixes following warning: include/linux/kern_levels.h:4:18: warning: format '%X' expects argument of type 'unsigned int', but argument 2 has type 'size_t {aka long unsigned int}' [-Wformat=] Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 22 Jun, 2017 7 commits
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Cyrille Pitchen authored
SPI NOR branches are now hosted on MTD repos, spi-nor/next is on l2-mtd and spi-nor/fixes is on linux-mtd. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
This makes TRX parsing code reusable with other platforms and parsers. Please note this patch doesn't really change anything in the existing code, just moves it. There is still some place for improvement (e.g. working on non-hacky method of checking rootfs format) but it's not really a subject of this change. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
Some devices have partitions that are kind of containers with extra subpartitions / volumes instead of e.g. a simple filesystem data. To support such cases we need to first create normal flash device partitions and then take care of these special ones. It's very common case for home routers. Depending on the vendor there are formats like TRX, Seama, TP-Link, WRGG & more. All of them are used to embed few partitions into a single one / single firmware file. Ideally all vendors would use some well documented / standardized format like UBI (and some probably start doing so), but there are still countless devices on the market using these poor vendor specific formats. This patch extends MTD subsystem by allowing to specify list of parsers that should be tried for a given partition. Supporting such poor formats is highly unlikely to be the top priority so these changes try to minimize maintenance cost to the minimum. It reuses existing code for these new parsers and just adds a one property and one new function. This implementation requires setting partition parsers in a flash parser. A proper change of bcm47xxpart will follow and in the future we will hopefully also find a solution for doing it with ofpart ("fixed-partitions"). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
Some flash device partitions can be containers with extra subpartitions (volumes). All callbacks are already capable of this additional level of indirection. This patch makes sure we always display subpartitions using a tree structure and takes care of deleting subpartitions when parent gets removed. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
This prepares mtd subsystem for the new feature: subpartitions. In some cases flash device partition can be a container with extra subpartitions (volumes). So far there was a flat structure implemented. One master (flash device) could be partitioned into few partitions. Every partition got its master and it was enough to get things running. To support subpartitions we need to store pointer to the parent for each partition. This is required to implement more natural tree structure and handle all recursion and offsets calculation. To make code consistent this patch renamed "master" to the "parent" in places where we can be dealing with subpartitions. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
When support for sysfs "offset" file was added it missed to update the del_mtd_partitions function. It deletes partitions just like mtd_del_partition does so both should also take care of removing sysfs files. This change moves sysfs_remove_files call to the shared function to fix this issue. Fixes: a62c24d7 ("mtd: part: Add sysfs variable for offset of partition") Cc: Dan Ehrenberg <dehrenberg@chromium.org> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Rafał Miłecki authored
There are two similar functions handling deletion. One handles single partition and another the whole MTD flash device. They share (duplicate) some code so it makes sense to add a small helper for that part. Function del_mtd_partitions has been moved a bit to keep all deleting stuff together. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 21 Jun, 2017 1 commit
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Cédric Le Goater authored
The segment registers of the SMC controller provide a way to configure the mapping windows of the chips on the AHB bus. The settings are required to be correct when the controller operates in Command mode, which is the case for DMAs and the LPC mapping. This tries to set the segment registers of each chip depending on the size of the flash device and depending on the previous segment settings, in order to have a contiguous window across multiple chips. Unfortunately, the AST2500 SPI controller has a bug and it is not possible to configure a full 128MB window for a chip of the same size. The window size needs to be restricted to 120MB. This issue only applies to CE0. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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- 20 Jun, 2017 7 commits
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Cédric Le Goater authored
There is no need to keep the dummy bytes in the control register if the command mode is not kept also. This could lead to an inconsistent setting : normal read mode (command 0x3) and dummy bytes. It is to be noted that the HW allows such a configuration. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Cédric Le Goater authored
These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Cédric Le Goater authored
These modules are used on the OpenPOWER Witherspoon systems to hold the POWER9 host firmware image. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Arvind Yadav authored
of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Benjamin Herrenschmidt authored
Similar to the other ones, different size. The "JV" suffix is in the datasheet, I haven't seen mentions of a different one. The datasheet indicates DUAL and QUAD are supported. http://www.winbond.com/resource-files/w25m512jv%20revc%2001062017.pdfSigned-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
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Brian Norris authored
This code is going to be reused for parsers matched using OF so let's factor it out to make this easier. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
Currently the only documented partitioning is "fixed-partitions" but there are more methods in use that we may want to support in the future. Mention them and make it clear Fixed Partitions are just a single case. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org>
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- 13 Jun, 2017 1 commit
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Chris Packham authored
erasesize is meaningful for flash devices but for SRAM there is no concept of an erase block so erasesize is set to 0. When partitioning these devices instead of ensuring partitions fall on erasesize boundaries we ensure they fall on writesize boundaries. Helped-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 08 Jun, 2017 3 commits
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Xiaolei Li authored
Write size in function write_eraseblock2 is subpgsize * k. It is wrong to check whether written is equal to subpgsize after each mtd_write. Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Richard Weinberger <richard@nod.at> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Chris Packham authored
The mchp23lcv1024 is similar to the mchp23k256, the differences (from a software point of view) are the capacity of the chip and the size of the addresses used. There is no way to detect the specific chip so we must be told via a Device Tree or default to mchp23k256 when device tree is not used. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Chris Packham authored
Setting the of_node for the mtd device allows the generic mtd code to setup the partitions. [Editorial note (Brian): patch still pending on fixing up the "aligned to eraseblock" partition sanity check, given that this SRAM has no eraseblocks.] Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 01 Jun, 2017 4 commits
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Chris Packham authored
Use mtd_device_register() instead of mtd_device_parse_register() to eliminate two unused parameters. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Chris Packham authored
This allows registering of this device via a Device Tree. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
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git://git.infradead.org/linux-mtdBrian Norris authored
From Boris: """ This pull request contains several fixes to the core and the tango driver. tango fixes: * Add missing MODULE_DEVICE_TABLE() in tango_nand.c * Update the number of corrected bitflips core fixes: * Fix a long standing memory leak in nand_scan_tail() * Fix several bugs introduced by the per-vendor init/detection infrastructure (introduced in 4.12) * Add a static specifier to nand_ooblayout_lp_hamming_ops definition """
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- 22 May, 2017 9 commits
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Colin Ian King authored
nand_ooblayout_lp_hamming_ops can be made static as it does not need to be in global scope. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Marc Gonzalez authored
According to Boris, some user-space tools expect MTD drivers to update ecc_stats.corrected, and it's better to provide a lower bound than to provide no information at all. Fixes: 6956e238 ("mtd: nand: add tango NAND flash controller support") Cc: stable@vger.kernel.org Reported-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Andres Galacho authored
The device table is required to load modules based on modaliases. After adding MODULE_DEVICE_TABLE, below entries for example will be added to module.alias: alias: of:N*T*Csigma,smp8758-nandC* alias: of:N*T*Csigma,smp8758-nand Fixes: 6956e238 ("mtd: nand: add tango NAND flash controller support") Cc: stable@vger.kernel.org Signed-off-by: Andres Galacho <andresgalacho@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Brian Norris authored
We don't handle cases larger than 7. We probably shouldn't pretend we know the ECC step size in this case, and it's probably also good to WARN() like we do in many other similar cases. Fixes: 8fc82d45 ("mtd: nand: samsung: Retrieve ECC requirements from extended ID") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Brian Norris authored
If we fail any time after calling nand_detect(), then we don't call the vendor-specific ->cleanup() callback, and we'll leak any resources the vendor-specific code might have allocated. Mark the "fix" against the first commit that started allocating anything in ->init(). Fixes: 626994e0 ("mtd: nand: hynix: Add read-retry support for 1x nm MLC NANDs") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Brian Norris authored
nand_ids isn't a separate module anymore and doesn't need this header. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Brian Norris authored
This bug seems to have been here forever, although we came close to fixing all of them in [1]! [1] 11eaf6df ("mtd: nand: Remove BUG() abuse in nand_scan_tail") Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Linus Torvalds authored
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Linus Torvalds authored
The code to fetch a 64-bit value from user space was entirely buggered, and has been since the code was merged in early 2016 in commit b2f68038 ("x86/mm/32: Add support for 64-bit __get_user() on 32-bit kernels"). Happily the buggered routine is almost certainly entirely unused, since the normal way to access user space memory is just with the non-inlined "get_user()", and the inlined version didn't even historically exist. The normal "get_user()" case is handled by external hand-written asm in arch/x86/lib/getuser.S that doesn't have either of these issues. There were two independent bugs in __get_user_asm_u64(): - it still did the STAC/CLAC user space access marking, even though that is now done by the wrapper macros, see commit 11f1a4b9 ("x86: reorganize SMAP handling in user space accesses"). This didn't result in a semantic error, it just means that the inlined optimized version was hugely less efficient than the allegedly slower standard version, since the CLAC/STAC overhead is quite high on modern Intel CPU's. - the double register %eax/%edx was marked as an output, but the %eax part of it was touched early in the asm, and could thus clobber other inputs to the asm that gcc didn't expect it to touch. In particular, that meant that the generated code could look like this: mov (%eax),%eax mov 0x4(%eax),%edx where the load of %edx obviously was _supposed_ to be from the 32-bit word that followed the source of %eax, but because %eax was overwritten by the first instruction, the source of %edx was basically random garbage. The fixes are trivial: remove the extraneous STAC/CLAC entries, and mark the 64-bit output as early-clobber to let gcc know that no inputs should alias with the output register. Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Benjamin LaHaise <bcrl@kvack.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: stable@kernel.org # v4.8+ Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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