- 22 Oct, 2010 40 commits
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Michael Hennerich authored
Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Sonic Zhang authored
We don't need our own header and structure to hook up the ad5398 part, so drop the custom resources for it. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
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Sonic Zhang authored
Rather than write our own ADP switch driver, use the existing fixed regulator driver and rewrite the platform resources accordingly. Signed-off-by:
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Michael Hennerich authored
Some peripherals might generate an error interrupt shortly after the data interrupt due to the fact that the peripheral isn't serviced fast enough. In most cases this isn't a problem and is expected behavior. This hasn't been a problem on most parts since you simply don't request the error interrupt (or you leave it disabled while there is an expected state) and do the peripheral status checking in the data interrupt. The Blackfin SIC allows people to prioritize data and error interrupts, and the Blackfin CEC allows interrupts of equal or higher priority to nest. The current default settings gives error interrupts a higher priority than data interrupts. So if an error occurs while processing the data interrupt, it will be serviced immediately. However, the error interrupt on the BF537 SIC cannot be enabled on a per-peripheral basis. Once the error interrupt is enabled for one peripheral, it is automatically enabled for all peripherals. Therefore lower the default multiplexed error interrupt priority so most people need not worry themselves with this issue. Signed-off-by:
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Michael Hennerich authored
Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
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Barry Song authored
Signed-off-by:
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Cliff Cai authored
Signed-off-by:
Cliff Cai <cliff.cai@analog.com> Signed-off-by:
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Yi Li authored
Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
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Barry Song authored
Signed-off-by:
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Mike Frysinger authored
The NAND platform driver expects the registers to have a "mem" resource type rather than "io". Signed-off-by: -
Michael Hennerich authored
With the recent kernel update the isp1362-hcd driver evaluates the IORESOURCE_IRQ resource flags and requests the irq with the given polarity/edge settings. However the ISP1362 config requires low level/edge interrupts. Most of the Blackfin boards use some random flag or no flag at all. Make all boards use a know good flag IORESOURCE_IRQ_LOWEDGE. Signed-off-by:
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Valentin Yakovenkov authored
The NAND platform driver expects the registers to have a "mem" resource type rather than "io". Signed-off-by:
Valentin Yakovenkov <yakovenkov@gmail.com> Signed-off-by:
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Michael Hennerich authored
Add platform resources for the on-chip CAN peripheral so we can use it. Signed-off-by:
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Barry Song authored
Make sure we use the right Kconfig names and platform strings. Signed-off-by:
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Barry Song authored
Now that we've rewritten the GPIO CS handling in the Blackfin SPI peripheral, we need to update the platform resources accordingly. Signed-off-by:
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Mike Frysinger authored
Now that the common header defines everything and the SPI drivers are using it, we can drop these duplicated global namespace polluters. Signed-off-by: -
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpcLinus Torvalds authored
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (71 commits) powerpc/44x: Update ppc44x_defconfig powerpc/watchdog: Make default timeout for Book-E watchdog a Kconfig option fsl_rio: Add comments for sRIO registers. powerpc/fsl-booke: Add e55xx (64-bit) smp defconfig powerpc/fsl-booke: Add p5020 DS board support powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips powerpc/fsl-booke: Add support for FSL Arch v1.0 MMU in setup_page_sizes powerpc/fsl-booke: Add support for FSL 64-bit e5500 core powerpc/85xx: add cache-sram support powerpc/85xx: add ngPIXIS FPGA device tree node to the P1022DS board powerpc: Fix compile error with paca code on ppc64e powerpc/fsl-booke: Add p3041 DS board support oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt. powerpc/fsl-booke: Add PCI device ids for P2040/P3041/P5010/P5020 QoirQ chips powerpc/mpc8xxx_gpio: Add support for 'qoriq-gpio' controllers powerpc/fsl_booke: Add support to boot from core other than 0 powerpc/p1022: Add probing for individual DMA channels powerpc/fsl_soc: Search all global-utilities nodes for rstccr powerpc: Fix invalid page flags in create TLB CAM path for PTE_64BIT powerpc/mpc83xx: Support for MPC8308 P1M board ... Fix up conflict with the generic irq_work changes in arch/powerpc/kernel/time.c
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git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-devLinus Torvalds authored
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (26 commits) include/linux/libata.h: fix typo pata_bf54x: fix return type of bfin_set_devctl Drivers: ata: Makefile: replace the use of <module>-objs with <module>-y libahci: fix result_tf handling after an ATA PIO data-in command pata_sl82c105: implement sff_irq_check() method pata_sil680: implement sff_irq_check() method pata_pdc202xx_old: implement sff_irq_check() method pata_cmd640: implement sff_irq_check() method ata_piix: Add device ID for ICH4-L pata_sil680: make sil680_sff_exec_command() 'static' ata: Intel IDE-R support libata: reorder ata_queued_cmd to remove alignment padding on 64 bit builds libata: Signal that our SATL supports WRITE SAME(16) with UNMAP ata_piix: remove SIDPR locking libata: implement cross-port EH exclusion libata: add @ap to ata_wait_register() and introduce ata_msleep() ata_piix: implement LPM support libata: implement LPM support for port multipliers libata: reimplement link power management libata: implement sata_link_scr_lpm() and make ata_dev_set_feature() global ...
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git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2Linus Torvalds authored
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2: (48 commits) ocfs2: Avoid to evaluate xattr block flags again. ocfs2/cluster: Release debugfs file elapsed_time_in_ms ocfs2: Add a mount option "coherency=*" to handle cluster coherency for O_DIRECT writes. Initialize max_slots early When I tried to compile I got the following warning: fs/ocfs2/slot_map.c: In function ‘ocfs2_init_slot_info’: fs/ocfs2/slot_map.c:360: warning: ‘bytes’ may be used uninitialized in this function fs/ocfs2/slot_map.c:360: note: ‘bytes’ was declared here Compiler: gcc version 4.4.3 (GCC) on Mandriva I'm not sure why this warning occurs, I think compiler don't know that variable "bytes" is initialized when it is sent by reference to ocfs2_slot_map_physical_size and it throws that ugly warning. However, a simple initialization of "bytes" variable with 0 will fix it. ocfs2: validate bg_free_bits_count after update ocfs2/cluster: Bump up dlm protocol to version 1.1 ocfs2/cluster: Show per region heartbeat elapsed time ocfs2/cluster: Add mlogs for heartbeat up/down events ocfs2/cluster: Create debugfs dir/files for each region ocfs2/cluster: Create debugfs files for live, quorum and failed region bitmaps ocfs2/cluster: Maintain bitmap of failed regions ocfs2/cluster: Maintain bitmap of quorum regions ocfs2/cluster: Track bitmap of live heartbeat regions ocfs2/cluster: Track number of global heartbeat regions ocfs2/cluster: Maintain live node bitmap per heartbeat region ocfs2/cluster: Reorganize o2hb debugfs init ocfs2/cluster: Check slots for unconfigured live nodes ocfs2/cluster: Print messages when adding/removing nodes ocfs2/cluster: Print messages when adding/removing heartbeat regions ...
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Linus Torvalds authored
Merge branch 'core-memblock-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'core-memblock-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (74 commits) x86-64: Only set max_pfn_mapped to 512 MiB if we enter via head_64.S xen: Cope with unmapped pages when initializing kernel pagetable memblock, bootmem: Round pfn properly for memory and reserved regions memblock: Annotate memblock functions with __init_memblock memblock: Allow memblock_init to be called early memblock/arm: Fix memblock_region_is_memory() typo x86, memblock: Remove __memblock_x86_find_in_range_size() memblock: Fix wraparound in find_region() x86-32, memblock: Make add_highpages honor early reserved ranges x86, memblock: Fix crashkernel allocation arm, memblock: Fix the sparsemem build memblock: Fix section mismatch warnings powerpc, memblock: Fix memblock API change fallout memblock, microblaze: Fix memblock API change fallout x86: Remove old bootmem code x86, memblock: Use memblock_memory_size()/memblock_free_memory_size() to get correct dma_reserve x86: Remove not used early_res code x86, memblock: Replace e820_/_early string with memblock_ x86: Use memblock to replace early_res x86, memblock: Use memblock_debug to control debug message print out ... Fix up trivial conflicts in arch/x86/kernel/setup.c and kernel/Makefile
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Andrea Gelmini authored
Signed-off-by:
Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by:
Jeff Garzik <jgarzik@redhat.com>
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Mike Frysinger authored
The new devctl func added for us to the driver has the wrong return type. Which is to say there shouldn't be any. This fixes compile time warnings as there shouldn't be any runtime difference. Signed-off-by:
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Tracey Dent authored
Changed <module>-objs to <module>-y in Makefile. Signed-off-by:
Tracey Dent <tdent48227@gmail.com> Signed-off-by:
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Tejun Heo authored
ATA devices don't send D2H Reg FIS after an successful ATA PIO data-in command. The host is supposed to take the TF and E_Status of the preceding PIO Setup FIS. Update ahci_qc_fill_rtf() such that it takes TF + E_Status from PIO Setup FIS after a successful ATA PIO data-in command. Without this patch, result_tf for such a command is filled with the content of the previous D2H Reg FIS which belongs to a previous command, which can make the command incorrectly seen as failed. * Patch updated to grab the whole TF + E_Status from PIO Setup FIS instead of just E_Status as suggested by Robert Hancock. Signed-off-by:
Tejun Heo <tj@kernel.org> Reported-by:
Mark Lord <kernel@teksavvy.com> Cc: Robert Hancock <hancockrwd@gmail.com> Cc: stable@kernel.org Signed-off-by:
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Sergei Shtylyov authored
Signed-off-by:
Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by:
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Sergei Shtylyov authored
Signed-off-by:
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Sergei Shtylyov authored
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Sergei Shtylyov authored
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Ben Hutchings authored
ICH4-L is a variant of ICH4 lacking USB2 functionality and with some different device IDs. It is documented in Intel specification update 290745-025, currently at <http://www.intel.com/assets/pdf/specupdate/290745.pdf>, and is included in the device ID table for piix. Signed-off-by:
Ben Hutchings <ben@decadent.org.uk> Signed-off-by:
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Sergei Shtylyov authored
... since, of course, it's not used outside this driver. Signed-off-by:
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Alan Cox authored
Intel IDE-R devices are part of the Intel AMT management setup. They don't have any special configuration registers or settings so the ata_generic driver will support them fully. Rather than add a huge table of IDs for each chipset and keep sending in new ones this patch autodetects them. Signed-off-by:
Alan Cox <alan@linux.intel.com> Acked-by:
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Richard Kennedy authored
Reorder structure ata_queued_cmd to remove 8 bytes of alignment padding on 64 bit builds & therefore reduce the size of structure ata_port by 256 bytes. Overall this will have little impact, other than reducing the amount of memory that is cleared when allocating ata_ports. Signed-off-by:
Richard Kennedy <richard@rsk.demon.co.uk> Signed-off-by:
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Martin K. Petersen authored
Until now identifying that a device supports WRITE SAME(16) with the UNMAP bit set has been black magic. Implement support for the SBC-3 Thin Provisioning VPD page and set the TPWS bit. Signed-off-by:
Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by:
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Tejun Heo authored
Now that libata provides proper cross-port EH exclusion. The SIDPR locking added by commit 213373cf (ata_piix: fix locking around SIDPR access) is no longer necessary. Remove it. Signed-off-by:
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Tejun Heo authored
In libata, the non-EH code paths should always take and release ap->lock explicitly when accessing hardware or shared data structures. However, once EH is active, it's assumed that the port is owned by EH and EH methods don't explicitly take ap->lock unless race from irq handler or other code paths are expected. However, libata EH didn't guarantee exclusion among EHs for ports of the same host. IOW, multiple EHs may execute in parallel on multiple ports of the same controller. In many cases, especially in SATA, the ports are completely independent of each other and this doesn't cause problems; however, there are cases where different ports share the same resource, which lead to obscure timing related bugs such as the one fixed by commit 213373cf (ata_piix: fix locking around SIDPR access). This patch implements exclusion among EHs of the same host. When EH begins, it acquires per-host EH ownership by calling ata_eh_acquire(). When EH finishes, the ownership is released by calling ata_eh_release(). EH ownership is also released whenever the EH thread goes to sleep from ata_msleep() or explicitly and reacquired after waking up. This ensures that while EH is actively accessing the hardware, it has exclusive access to it while allowing EHs to interleave and progress in parallel as they hit waiting stages, which dominate the time spent in EH. This achieves cross-port EH exclusion without pervasive and fragile changes while still allowing parallel EH for the most part. This was first reported by yuanding02@gmail.com more than three years ago in the following bugzilla. :-) https://bugzilla.kernel.org/show_bug.cgi?id=8223Signed-off-by:
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Tejun Heo authored
Add optional @ap argument to ata_wait_register() and replace msleep() calls with ata_msleep() which take optional @ap in addition to the duration. These will be used to implement EH exclusion. This patch doesn't cause any behavior difference. Signed-off-by:
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Tejun Heo authored
Now that DIPM can be used independently from HIPM, ata_piix can support LPM too. Signed-off-by:
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Tejun Heo authored
Port multipliers can do DIPM on fan-out links fine. Implement support for it. Tested w/ SIMG 57xx and marvell PMPs. Both the host and fan-out links enter power save modes nicely. SIMG 37xx and 47xx report link offline on SStatus causing EH to detach the devices. Blacklisted. Signed-off-by:
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Tejun Heo authored
The current LPM implementation has the following issues. * Operation order isn't well thought-out. e.g. HIPM should be configured after IPM in SControl is properly configured. Not the other way around. * Suspend/resume paths call ata_lpm_enable/disable() which must only be called from EH context directly. Also, ata_lpm_enable/disable() were called whether LPM was in use or not. * Implementation is per-port when it should be per-link. As a result, it can't be used for controllers with slave links or PMP. * LPM state isn't managed consistently. After a link reset for whatever reason including suspend/resume the actual LPM state would be reset leaving ap->lpm_policy inconsistent. * Generic/driver-specific logic boundary isn't clear. Currently, libahci has to mangle stuff which libata EH proper should be handling. This makes the implementation unnecessarily complex and fragile. * Tied to ALPM. Doesn't consider DIPM only cases and doesn't check whether the device allows HIPM. * Error handling isn't implemented. Given the extent of mismatch with the rest of libata, I don't think trying to fix it piecewise makes much sense. This patch reimplements LPM support. * The new implementation is per-link. The target policy is still port-wide (ap->target_lpm_policy) but all the mechanisms and states are per-link and integrate well with the rest of link abstraction and can work with slave and PMP links. * Core EH has proper control of LPM state. LPM state is reconfigured when and only when reconfiguration is necessary. It makes sure that LPM state is reset when probing for new device on the link. Controller agnostic logic is now implemented in libata EH proper and driver implementation only has to deal with controller specifics. * Proper error handling. LPM config failure is attributed to the device on the link and LPM is disabled for the link if it fails repeatedly. * ops->enable/disable_pm() are replaced with single ops->set_lpm() which takes @policy and @hints. This simplifies driver specific implementation. Signed-off-by:
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Tejun Heo authored
Link power management is about to be reimplemented. Prepare for it. * Implement sata_link_scr_lpm(). * Drop static from ata_dev_set_feature() and make it available to other libata files. * Trivial whitespace adjustments. Signed-off-by:
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