It broke some existing setups, so let's drop it until we have
a better notion of how to do this.

This is an obvious scalability improvement for write()s.  We used a
global lock to protect the inode writecount (updated on every open for
writing) - this just makes it use the existing inode->i_lock instead.

Compiles & boots fine on x86 SMP.

into home.osdl.org:/home/torvalds/v2.5/linux

into kernel.bkbits.net:/home/davem/sparc-2.6

into home.osdl.org:/home/torvalds/v2.5/linux

into home.osdl.org:/home/torvalds/v2.5/linux

into sgi.com:/source2/xfs-linux-2.6

SGI Modid: xfs-linux:xfs-kern:166504a

	via /proc/efi/fpswa, rather than printing it at boot time.

into kleikamp.dyn.webahead.ibm.com:/shaggy/bk/jfs-2.5

Periodically check for outstanding MCA or INIT records and pass them to
user space salinfo.

Correct the "did we recover from MCA test" and move it up a level to
simplify interaction with debuggers.

Thanks to Nick's domain patch, the kernel worked fine with
smp_num_siblings = 4 (in simulation).

into home.osdl.org:/home/torvalds/v2.5/linux

Another fix from Dominik.

From Dominik..
The different P-4-M steppings have different "ebx" values. Analyze it
correctly to sort out Pentium-4-based Celerons.

Move the table verification to an extra function.

Remove the *ppst table, and remove an unneccessary forward-declaration

Keep *ppst local to the only function which needs it any longer.

Use the frequency_table for calculating the correct ->target state

Add a struct cpufreq_frequency_table, fill it with content, and use it for
->verify.

Reverting frequency changes on unloading is uncommon for cpufreq drivers
so let's remove this speciality.

into delerium.codemonkey.org.uk:/mnt/nfs/sepia/bar/src/kernel/2.6/trees/cpufreq

From: Hiroshi Miura <miura at da-cha.org>
                                                                                                        
I mistook a Geode chipset's register meanings. (-.-;
ON is not 'CPU is ON' but 'cpu modulation is ON' that is stops cpu.
                                                                                                               
this causes a bad freq setting.
                                                                                                               
This patch fixes this and minor bug that is,
                                                                                                               
        if (new_khz == stock_freq) {  /* if new khz == 100% of CPU speed, it is special case */
                local_irq_save(flags);
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
                                                                                                               
cpufreq_notify_transition() called after local_irq_save();
this makes not update cpu_khz.

Patches from Ben Woodward to calculate irq_safe once and pass it around.

[PATCH] ia64: mca.c cleanup - Reorder to remove the need for forward declarations and to consolidate related code

[PATCH] ia64: mca.c cleanup - Delete all record printing code, moved to salinfo_decode in user space

Port the ia64 mca.c clean up patches from 2.4.25-pre8 to 2.6.2-rc2.

The following 6 patches do :-

1 Avoid deadlock when using printk() for MCA and INIT records.
2 Delete all record printing code, moved to salinfo_decode in user space.
3 Mark variables and functions static where possible.
4 Delete dead variables and functions.
5 Reorder to remove the need for forward declarations and to consolidate
  related code.
6 Bjorn's printk cleanup.

Altogether they shrink mca.c from 2432 to 1339 lines and make it much
more readable.

The only functional change is the removal of any attempt to print the
CMC/CPE/MCA/INIT record contents in the kernel plus the addition of an
info printk to ia64_mca_check_errors(), to match 2.4.  Now we just get
one line to say that a record has been detected, except for MCA which
prints nothing at all.

   I've been doing some performance tuning and adding some functionality
to sba_iommu for zx1/sx1000 chipsets.  This adds:

      * Long overdue consistent_dma_mask support
      * Long overdue ability to do large mappings in the iommu
      * Tightened spinlock usage for better performance/scalability
      * Added branch prediction hints for some of the performance paths
      * Added explicit data prefetching to some performance paths -
        perfmon shows roughly a 20% decrease in L3 misses in the bitmap
        search code
      * Increased delayed resource freeing depth and added a separate
        lock per ioc to avoid contention
      * Added code to free up queued pdir entries should we be unable to
        find space for new ones (not that I've ever seen the pdir
        anywhere close to full)
      * Finished cleaning out the hint support code, Grant is
        maintaining this separately for now
      * Added option to control bypass of sg mappings separately from
        single/coherent mappings

Much like the swiotlb, sba_iommu allows devices capable of 64bit
addressing to bypass the iommu and DMA directly to/from memory.  Using a
worst case scenario test (64bit bypass disabled, all DMA mapped through
the iommu), I saw a 60% increase in sequential block input throughput
using bonnie++ on a large RAID0 MD array.  In fact, this patch provides
the best bonnie++ performance with bypass disabled.  This is likely due
to benefits seen from coalescing the scatterlist, allowing better disk
streaming.  I assume that network performance will likely be limited by
mapping latency, so I added the last bullet item to allow sg mappings to
get the benefit of coalescing while keeping a low latency path for
single and coherent mappings.  If anyone is setup for network
benchmarks, I'd be interested in a before and after with this patch.

This patch fixes a corner-case of ld.a emulation.  ld.a should be
emulated such that it always loads a misaligned value and clears the
corresponding ALAT entry.  The old emulation was correct for the case
where ld.a was followed by ld.c/chk.a (since ALAT entry was cleared),
but wrong for the case where it _wasn't_ followed by ld.c/chk.a.  In
that case, the misaligned value wasn't read from memory, as it should
have been.