1. 09 Jun, 2019 28 commits
  2. 08 Jun, 2019 12 commits
    • David S. Miller's avatar
      Merge branch 'PTP-support-for-the-SJA1105-DSA-driver' · 8d94a873
      David S. Miller authored
      Vladimir Oltean says:
      
      ====================
      PTP support for the SJA1105 DSA driver
      
      This patchset adds the following:
      
       - A timecounter/cyclecounter based PHC for the free-running
         timestamping clock of this switch.
      
       - A state machine implemented in the DSA tagger for SJA1105, which
         keeps track of metadata follow-up Ethernet frames (the switch's way
         of transmitting RX timestamps).
      
      Clock manipulations on the actual hardware PTP clock will have to be
      implemented anyway, for the TTEthernet block and the time-based ingress
      policer.
      
      v3 patchset can be found at:
      https://lkml.org/lkml/2019/6/4/954
      
      Changes from v3:
      
      - Made it compile with the SJA1105 DSA driver and PTP driver as modules.
      
      - Reworked/simplified/fixed some issues in 03/17
        (dsa_8021q_remove_header) and added an ASCII image that
        illustrates the transformation that is taking place.
      
      - Removed a useless check for sja1105_is_link_local from 16/17 (RX
        timestamping) which also made previous 08/17 patch ("Move
        sja1105_is_link_local to include/linux") useless and therefore dropped.
      
      v2 patchset can be found at:
      https://lkml.org/lkml/2019/6/2/146
      
      Changes from v2:
      
      - Broke previous 09/10 patch (timestamping) into multiple smaller
        patches.
      
      - Every patch in the series compiles.
      
      v1 patchset can be found at:
      https://lkml.org/lkml/2019/5/28/1093
      
      Changes from v1:
      
      - Removed the addition of the DSA .can_timestamp callback.
      
      - Waiting for meta frames is done completely inside the tagger, and all
        frames emitted on RX are already partially timestamped.
      
      - Added a global data structure for the tagger common to all ports.
      
      - Made PTP work with ports in standalone mode, by limiting use of the
        DMAC-mangling "incl_srcpt" mode only when ports are bridged, aka when
        the DSA master is already promiscuous and can receive anything.
        Also changed meta frames to be sent at the 01-80-C2-00-00-0E DMAC.
      
      - Made some progress w.r.t. observed negative path delay.  Apparently it
        only appears when the delay mechanism is the delay request-response
        (end-to-end) one. If peer delay is used (-P), the path delay is
        positive and appears reasonable for an 1000Base-T link (485 ns in
        steady state).
      
        SJA1105 as PTP slave (OC) with E2E path delay:
      
      ptp4l[55.600]: master offset          8 s2 freq  +83677 path delay     -2390
      ptp4l[56.600]: master offset         17 s2 freq  +83688 path delay     -2391
      ptp4l[57.601]: master offset          6 s2 freq  +83682 path delay     -2391
      ptp4l[58.601]: master offset         -1 s2 freq  +83677 path delay     -2391
      
        SJA1105 as PTP slave (OC) with P2P path delay:
      
      ptp4l[48.343]: master offset          5 s2 freq  +83715 path delay       484
      ptp4l[48.468]: master offset         -3 s2 freq  +83705 path delay       485
      ptp4l[48.593]: master offset          0 s2 freq  +83708 path delay       485
      ptp4l[48.718]: master offset          1 s2 freq  +83710 path delay       485
      ptp4l[48.844]: master offset          1 s2 freq  +83710 path delay       485
      ptp4l[48.969]: master offset         -5 s2 freq  +83702 path delay       485
      ptp4l[49.094]: master offset          3 s2 freq  +83712 path delay       485
      ptp4l[49.219]: master offset          4 s2 freq  +83714 path delay       485
      ptp4l[49.344]: master offset         -5 s2 freq  +83702 path delay       485
      ptp4l[49.469]: master offset          3 s2 freq  +83713 path delay       487
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8d94a873
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Expose PTP timestamping ioctls to userspace · a602afd2
      Vladimir Oltean authored
      This enables the PTP support towards userspace applications such as
      linuxptp.
      
      The switches can timestamp only trapped multicast MAC frames, and
      therefore only the profiles of 1588 over L2 are supported.
      
      TX timestamping can be enabled per port, but RX timestamping is enabled
      globally. As long as RX timestamping is enabled, the switch will emit
      metadata follow-up frames that will be processed by the tagger. It may
      be a problem that linuxptp does not restore the RX timestamping settings
      when exiting.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a602afd2
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add a state machine for RX timestamping · f3097be2
      Vladimir Oltean authored
      Meta frame reception relies on the hardware keeping its promise that it
      will send no other traffic towards the CPU port between a link-local
      frame and a meta frame.  Otherwise there is no other way to associate
      the meta frame with the link-local frame it's holding a timestamp of.
      The receive function is made stateful, and buffers a timestampable frame
      until its meta frame arrives, then merges the two, drops the meta and
      releases the link-local frame up the stack.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f3097be2
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Increase priority of CPU-trapped frames · 08fde09a
      Vladimir Oltean authored
      Without noticing any particular issue, this patch ensures that
      management traffic is treated with the maximum priority on RX by the
      switch.  This is generally desirable, as the driver keeps a state
      machine that waits for metadata follow-up frames as soon as a management
      frame is received.  Increasing the priority helps expedite the reception
      (and further reconstruction) of the RX timestamp to the driver after the
      MAC has generated it.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      08fde09a
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add a global sja1105_tagger_data structure · 844d7edc
      Vladimir Oltean authored
      This will be used to keep state for RX timestamping. It is global
      because the switch serializes timestampable and meta frames when
      trapping them towards the CPU port (lower port indices have higher
      priority) and therefore having one state machine per port would create
      unnecessary complications.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      844d7edc
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Receive and decode meta frames · e53e18a6
      Vladimir Oltean authored
      This adds support in the tagger for understanding the source port and
      switch id of meta frames.  Their timestamp is also extracted but not
      used yet - this needs to be done in a state machine that modifies the
      previously received timestampable frame - will be added in a follow-up
      patch.
      
      Also take the opportunity to:
      - Remove a comment in sja1105_filter made obsolete by e8d67fa5
        ("net: dsa: sja1105: Don't store frame type in skb->cb")
      - Reorder the checks in sja1105_filter to optimize for the most likely
        scenario first: regular traffic.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e53e18a6
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Make sja1105_is_link_local not match meta frames · 79fa7061
      Vladimir Oltean authored
      Although meta frames are configured to be sent at SJA1105_META_DMAC
      (01-80-C2-00-00-0E) which is a multicast MAC address that would also be
      trapped by the switch to the CPU, were it to receive it on a front-panel
      port, meta frames are conceptually not link-local frames, they only
      carry their RX timestamps.
      
      The choice of sending meta frames at a multicast DMAC is a pragmatic
      one, to avoid installing an extra entry to the DSA master port's
      multicast MAC filter.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      79fa7061
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add support for the AVB Parameters Table · 24c01949
      Vladimir Oltean authored
      This table is used to program the switch to emit "meta" follow-up
      Ethernet frames (which contain partial RX timestamps) after each
      link-local frame that was trapped to the CPU port through MAC filtering.
      This includes PTP frames.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      24c01949
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Build a minimal understanding of meta frames · d3f9b90b
      Vladimir Oltean authored
      Meta frames are sent on the CPU port by the switch if RX timestamping is
      enabled. They contain a partial timestamp of the previous frame.
      
      They are Ethernet frames with the Ethernet header constructed out of:
      
      - SJA1105_META_DMAC
      - SJA1105_META_SMAC
      - ETH_P_SJA1105_META
      
      The Ethernet payload will be decoded in a follow-up patch.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d3f9b90b
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add logic for TX timestamping · 47ed985e
      Vladimir Oltean authored
      On TX, timestamping is performed synchronously from the
      port_deferred_xmit worker thread.
      In management routes, the switch is requested to take egress timestamps
      (again partial), which are reconstructed and appended to a clone of the
      skb that was just sent.  The cloning is done by DSA and we retrieve the
      pointer from the structure that DSA keeps in skb->cb.
      Then these clones are enqueued to the socket's error queue for
      application-level processing.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      47ed985e
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Add support for the PTP clock · bb77f36a
      Vladimir Oltean authored
      The design of this PHC driver is influenced by the switch's behavior
      w.r.t. timestamping.  It exposes two PTP counters, one free-running
      (PTPTSCLK) and the other offset- and frequency-corrected in hardware
      through PTPCLKVAL, PTPCLKADD and PTPCLKRATE.  The MACs can sample either
      of these for frame timestamps.
      
      However, the user manual warns that taking timestamps based on the
      corrected clock is less than useful, as the switch can deliver corrupted
      timestamps in a variety of circumstances.
      
      Therefore, this PHC uses the free-running PTPTSCLK together with a
      timecounter/cyclecounter structure that translates it into a software
      time domain.  Thus, the settime/adjtime and adjfine callbacks are
      hardware no-ops.
      
      The timestamps (introduced in a further patch) will also be translated
      to the correct time domain before being handed over to the userspace PTP
      stack.
      
      The introduction of a second set of PHC operations that operate on the
      hardware PTPCLKVAL/PTPCLKADD/PTPCLKRATE in the future is somewhat
      unavoidable, as the TTEthernet core uses the corrected PTP time domain.
      However, the free-running counter + timecounter structure combination
      will suffice for now, as the resulting timestamps yield a sub-50 ns
      synchronization offset in steady state using linuxptp.
      
      For this patch, in absence of frame timestamping, the operations of the
      switch PHC were tested by syncing it to the system time as a local slave
      clock with:
      
      phc2sys -s CLOCK_REALTIME -c swp2 -O 0 -m -S 0.01
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bb77f36a
    • Vladimir Oltean's avatar
      net: dsa: sja1105: Export symbols for upcoming PTP driver · 28e8fb3e
      Vladimir Oltean authored
      These are needed for the situation where the switch driver and the PTP
      driver are both built as modules.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      28e8fb3e