- 27 Jun, 2013 40 commits
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Alex Deucher authored
These are needed for certain UVD power saving features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This is required for certain power management features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Enables PCIE ASPM (Active State Power Management) on SI asics. v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Enables PCIE ASPM (Active State Power Management) on evergreen-cayman asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Required for accessing certain pcie related registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
If both the motherboard and GPU support pcie gen2 or 3, enable it. PCIE gen2 and 3 offer more bandwidth than pcie gen1. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
SI uses a new atom table revision. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
SI uses a new atom table. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
There's a new table for calculating the memory pll parameters on SI. Required for SI DPM support. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
These functions use acpi methods to adjust the pcie gen speed. Used by DPM. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use the new asic callback instead. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Now that the proper fix has been implemented I can remove the last remnants of the initial implementation. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This properly implemented dynamic state adjustment by using a working copy of the requested and current power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
For r6xx-evergreen, they are no-ops as they don't support any dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to properly handle dynamic state adjustment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This adds dpm support for cayman asics. This includes: - clockgating - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2 switching (requires additional acpi support) - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: fold in tdp fix v3: fix indentation v4: fix 64 bit div v5: attempt to fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
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Alex Deucher authored
Use a dedicated copy of the current power state since we may have to adjust it on the fly. v2: fix up redundant state sets Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use a dedicated copy of the current power state since we may have to adjust it on the fly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use a dedicated copy of the current power state since we may have to adjust it on the fly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Driver needs this information to validate power states. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This data will be needed for dpm on newer asics. v2: fix typo in rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
When using UVD, the driver must switch to a special UVD power state. In the CS ioctl, switch to the power state and schedule work to change the power state back, when the work comes up, check if uvd is still busy and if not, switch back to the user state, otherwise, reschedule the work. Note: We really need some better way to decide when to switch out of the uvd power state. Switching power states while playback is active make uvd angry. V2: fix locking. V3: switch from timer to delayed work V4: check fence driver for UVD jobs, reduce timeout to 1 second and rearm timeout on activity v5: rebase on new dpm tree v6: rebase on interim uvd on demand changes v7: fix UVD when DPM is disabled v8: unify non-DPM and DPM UVD handling v9: remove leftover idle work struct Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de>
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Alex Deucher authored
v2: fix typo noticed by Dan Carpenter Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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