Merge tag 'tegra-for-4.8-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late

Merge "arm64: tegra: Device tree changes for v4.8-rc1" from Thierry Reding:

A slew of updates for Tegra210 support: PMIC and regulator additions,
which in turn allow a bunch of features to be enabled. Some assemblies
of the Jetson TX1 come with a DSI panel that is now supported. For all
other assemblies, this set of changes enables the HDMI output. Jetson
TX1 can now also make use of the XUSB controller.

PMIC and regulator support is also added for Smaug, which will allow a
number of interesting feature additions in future releases.

* tag 'tegra-for-4.8-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable HDMI on Jetson TX1
  arm64: tegra: Add sor1_src clock
  arm64: tegra: Add XUSB powergates on Tegra210
  arm64: tegra: Add DPAUX pinctrl bindings
  arm64: tegra: Add ACONNECT bus node for Tegra210
  arm64: tegra: Add audio powergate node for Tegra210
  arm64: tegra: Add regulators for Tegra210 Smaug
  arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
  arm64: tegra: Enable XUSB controller on Jetson TX1
  arm64: tegra: Enable debug serial on Jetson TX1
  arm64: tegra: Add Tegra210 XUSB controller
  arm64: tegra: Add Tegra210 XUSB pad controller
  arm64: tegra: Add DSI panel on Jetson TX1
  arm64: tegra: p2597: Add SDMMC power supplies
  arm64: tegra: Add PMIC support on Jetson TX1

Merge "ARM64: DT: Hisilicon Hi6220 updates for 4.8" from Wei Xu:

- Add pl031 rtc0 and rtc1 support for hi6220 SoC

* tag 'hi6220-dt-for-4.8-2' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hi6220: Add pl031 RTC support
  clk: hi6220: Add RTC clock for pl031

These are a prerequisite to some of the tegra DT changes,
and got merged as part of tegra-for-4.8-clk into clk-next.

* commit 'e452b818':
  clk: tegra: Enable sor1 and sor1_src on Tegra210
  clk: tegra: Squash sor1 safe/brick/src into a single mux
  clk: tegra: Disable spread spectrum on pll_d2
  clk: tegra: Fixup post dividers on Tegra210

This is needed to work around another failure with "make dtbs":

In file included from ../arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts:12:0:
arch/arm64/boot/dts/renesas/r8a7796.dtsi:13:44: fatal error: dt-bindings/power/r8a7796-sysc.h: No such file or directory

* renesas/rcar-sysc:
  soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas
  soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
  soc: renesas: rcar-sysc: Document r8a7796 support

This is required to avoid a 'make dtbs' failure:

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi:47:56: fatal error: dt-bindings/reset/amlogic,meson-gxbb-reset.h: No such file or directory

The dependency was not handled right earlier, I'm fixing up the branch here
to minimize the bisection problem.

* reset/for-4.8-2:
  dt-bindings: reset: Add bindings for the Meson SoC Reset Controller
  reset: Add support for the Amlogic Meson SoC Reset Controller
  reset: Return -ENOTSUPP when not configured
  reset: oxnas: Use devm register API and get rid of platform remove
  reset: fix Kconfig menu to include reset drivers in sub-menu
  reset: zynq: use devm_reset_controller_register()
  reset: socfpga: use devm_reset_controller_register()
  reset: sunxi: use devm_reset_controller_register()
  reset: pistachio: use devm_reset_controller_register()
  reset: ath79: use devm_reset_controller_register()
  reset: add devm_reset_controller_register API

Signed-off-by: Thierry Reding <treding@nvidia.com>

The sor1 IP block needs the sor1_src clock to configure the clock tree
depending on whether it's running in HDMI or DP mode.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the DPAUX pinctrl states for the DPAUX nodes defining all three
possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
node for the DPAUX nodes so that the I2C driver core does not attempt
to parse the pinctrl state nodes.

Populate the nodes for the pinctrl clients of the DPAUX pin controller.
There are two clients for each DPAUX instance, namely the SOR and one of
the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
or I2C modes and so for these devices we don't define any of the generic
pinctrl states (default, idle, etc) because the SOR driver will directly
set the state needed. For I2C clients only the I2C mode is used and so
we can simplify matters by using the generic pinctrl states for default
and idle.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the ACONNECT bus node for Tegra210 which is used to interface to
the various devices in the Audio Processing Engine (APE).
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the audio powergate for Tegra210.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add regulators to the Tegra210 Smaug DTS file including support for the
MAX77620 PMIC.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for
the XUSB pad controller. For some Tegra210 boards, this is causing USB
connect and disconnect events to go undetected. Fix this by changing the
interrupt number for the XUSB mailbox to 40.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Enable the XUSB controller on Jetson TX1. One of the USB 3.0 lanes goes
to an internal ethernet interface, while a second USB 3.0 lane supports
the USB-A receptacle on the I/O board.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a chosen node to the device tree that contains a stdout-path
property which defines the debug serial port.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a device tree node for the XUSB pad controller found on Tegra210.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel
connected via four DSI lanes.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add power supplies for the SD/MMC card slot. Note that vmmc-supply is
currently restricted to 3.3 V because we don't support switching the
mode yet.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a device tree node for the MAX77620 PMIC found on the p2180
processor module (Jetson TX1). Also add supporting power supplies,
such as the main 5 V system supply.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Merge tag 'samsung-dt64-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Merge "Samsung DeviceTree changes for ARM64 for v4.8" from Krzysztof Kozlowski:

1. Adjust the voltage of CPU buck regulator so scaling could work.

* tag 'samsung-dt64-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Modify the voltage range for BUCK2 for exynos7

Merge tag 'juno-dt-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64

Merge "Juno platform DT updates for v4.8" from Sudeep Holla:

1. Adds various CoreSight debug components on Juno boards

2. Adds SCPI device power domains and use them for coresight components

3. Adds thermal zones for SCPI sensors on Juno

* tag 'juno-dt-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: add thermal zones for scpi sensors
  arm64: dts: juno: add SCPI power domains for device power management
  arm64: dts: juno: add coresight support

Merge tag 'renesas-arm64-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.8" from Simon Horman:

* Add support for  r8a7796/salvator-x (R-Car Gen 3 M3-W)
* Add CAN support to r8a7795 (R-Car Gen 3 H3)

* tag 'renesas-arm64-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7796/salvator-x: Enable watchdog timer
  arm64: dts: r8a7796: Add RWDT node
  arm64: dts: r8a7796: Use SYSC "always-on" PM Domain
  arm64: dts: r8a7796: Add SYSC PM Domains
  arm64: dts: salvator-x: add Salvator-X board on R8A7796 SoC
  arm64: dts: r8a7796: Add Renesas R8A7796 SoC support
  arm64: dts: r8a7795: Add CAN FD support
  arm64: dts: r8a7795: Add missing blank lines between cpu nodes
  clk: renesas: r8a7795: Add THS/TSC clock
  clk: renesas: r8a7795: Add DRIF clock
  clk: renesas: r8a7795: Correct lvds clock parent
  clk: renesas: r8a7795: Provide FDP1 clocks
  clk: renesas: Add R8A7792 support
  clk: renesas: mstp: Document R8A7792 support
  clk: renesas: rcar-gen2: Document R8A7792 support
  clk: renesas: cpg-mssr: Add support for R-Car M3-W
  clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
  clk: renesas: Add r8a7796 CPG Core Clock Definitions
  clk: renesas: cpg-mssr: Document r8a7796 support

This reverts commit f3abd629, which caused a build regression:

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi:48:41: fatal error: dt-bindings/clock/gxbb-clkc.h: No such file or directory

We should apply this patch one merge window later, once the clk branch
is merged as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'arm-soc/for-4.8/devicetree-arm64-part2' of http://github.com/Broadcom/stblinux into next/dt64

Merge "Broadcom ARM64 Device Tree changes for 4.8 (part 2)" from Florian Fainelli:

This pull request contains the second part of the Broadcom ARM64-based SoCs
changes for 4.8. Please note that this pull request contains changes from the
ARM 32-bits port and ARM 64-bits port as well:

- Lubomir updates all BCM2835 (Raspberry Pi family) Device Tree source files with
  their proper information about the on-board USB Ethernet adapter so there is
  appropriate binding between this USB device and a device_node (useful for MAC
  address fetching and stuff), this commit is also present for the ARM DT pull
  request

- Eric adds support for the Raspberry Pi 3 aka BCM2837 and provides the binding
  information and the basic SoC DT include file required to boot to a prompt

- Gerd updates the Raspberry Pi 3 DT with Ethernet information based on the
  earlier change from Lubomir

* tag 'arm-soc/for-4.8/devicetree-arm64-part2' of http://github.com/Broadcom/stblinux:
  ARM: bcm2837: dt: Add the ethernet to the device trees
  ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
  dt-bindings: Add root properties for Raspberry Pi 3
  ARM: bcm2835: dt: Add the ethernet to the device trees

Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Merge "Amlogic 64-bit DT updates" from Kevin Hilman:

- add RNG and new clock driver support

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: DTS: meson-gxbb: switch ethernet to real clock
  arm64: dts: gxbb clock controller
  ARM64: dts: meson-gxbb: Add Hardware Random Generator node
  dt-bindings: hwrng: Add Amlogic Meson Hardware Random Generator bindings

Add pl031 rtc0 and rtc1 support to hi6220 dtsi

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
[jstultz: Forward ported and tweaked commit description,
 added rtc1 entry as suggested by Guodong]
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

Merge "mvebu dt64 for 4.8 (part 1)" from Gregory CLEMENT:

- update dt with mv-xor-v2 found in the Armada 7K/8K SoCs
- update dt with the clocks found in the Armada 3700 SoCs

* tag 'mvebu-dt64-4.8-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: add peripherals clocks for Armada 37xx
  arm64: dts: marvell: add tbg clocks for Armada 37xx
  arm64: dts: marvell: Add xtal clock support for Armada 3700
  arm64: dts: marvell: add XOR engine description for Armada 7K/8K CP
  arm64: dts: marvell: adjust to the latest mv-xor-v2 DT binding

Merge "ARM: mediatek: dts 64 bit updates for v4.8" from Matthias Brugger:

- Add nodes for the DISP function ports
- Add dt-bindings for mt6755
- Add basic support for mt6755 SoC

* tag 'v4.7-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mediatek: add mt6755 support
  Document: DT: Add bindings for mediatek MT6755 SoC Platform
  arm64: dts: mt8173: Add display subsystem related nodes

Enable the Watchdog Timer (WDT) controller on the Renesas Salvator-X
board equipped with an R-Car M3-W (r8a7796) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Watchdog Timer (WDT) controller on the Renesas
R-Car M3-W (r8a7796) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the System Controller.
Hook up the Cortex-A57 CPU core and L2 cache/SCU to their respective PM
Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds initial board support for R8A7796 Salvator-X.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Basic support for the Gen 3 R-Car M3-W SoC.

Based on work for the r8a7795 and r8a7796 SoCs by
Takeshi Kihara, Dirk Behme and Geert Uytterhoeven.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Adds CAN FD controller node for r8a7795.

Note: CAN FD controller register base address specified in R-Car Gen3
Hardware User Manual v0.5E is incorrect. The correct address is:

CAN FD - 0xe66c0000
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

For consistency with a57_0/a57_1 cpu nodes, and all other nodes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

clk: renesas: Updates for v4.8 (take two)

  - Add support for R-Car V2H,
  - Add FDP1, DRIF, and thermal clocks on R-Car H3,
  - Correct a wrong parent clock.

Merge tag 'v4.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

The rk3399 gets support for its emmc controller as well as thermal,
i2c and core io-domain nodes and some reasonable default rates
for core clocks. The rk3368 also gets io-domains for its r88 board
as well as a small fix for the gic's memory regions.

* tag 'v4.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add ap_pwroff and ddrio_pwroff pins for rk3399
  arm64: dts: rockchip: Provide emmcclk to PHY for rk3399
  arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399
  arm64: dts: rockchip: fixes the gic400 2nd region size for rk3368
  arm64: dts: rockchip: add i2c nodes for rk3399
  arm64: dts: rockchip: add thermal nodes for rk3399 SoCs
  arm64: dts: rockchip: add rk3399 io-domain core nodes
  arm64: dts: rockchip: add rk3368-r88 iodomains
  arm64: dts: rockchip: add rk3368 io-domain core nodes
  arm64: dts: rockchip: make rk3368 grf syscons simple-mfds
  arm64: dts: rockchip: enable eMMC for rk3399 EVB
  arm64: dts: rockchip: add sdhci/emmc for rk3399
  arm64: dts: rockchip: make rk3399's grf a "simple-mfd"
  arm64: dts: rockchip: assign default rates for core rk3399 clocks
Signed-off-by: Olof Johansson <olof@lixom.net>

Change the BUCK2 (vdd_atlas) voltage range to '500 - 1200mv' since
CPU DVFS requires it.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>