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- 10 Oct, 2008 1 commit
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Sylver Bruneau authored
This patch allows the use of the hardware watchdog in the Marvell Orion series of ARM SoCs. Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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- 25 Sep, 2008 1 commit
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Lennert Buytenhek authored
The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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- 09 Aug, 2008 2 commits
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Saeed Bishara authored
Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Lennert Buytenhek authored
On D0 5281 SoCs, we need to disable the wait-for-interrupt instruction due to an erratum. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Acked-by: Martin Michlmayr <tbm@cyrius.com>
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- 07 Aug, 2008 1 commit
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Russell King authored
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 22 Jun, 2008 2 commits
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Ke Wei authored
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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Lennert Buytenhek authored
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
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- 27 Mar, 2008 1 commit
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Lennert Buytenhek authored
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Saeed Bishara <saeed@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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