- 24 Apr, 2015 36 commits
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Jiang Liu authored
Introduce several helper functions, which will be used to enable hierarchical irqdomain for IOAPIC. Signed-off-by:
Jiang Liu <jiang.liu@linux.intel.com> Tested-by:
Joerg Roedel <jroedel@suse.de> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1428905519-23704-37-git-send-email-jiang.liu@linux.intel.comSigned-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Jiang Liu authored
Simplify the way to print IOAPIC entry content, so we can remove native_io_apic_print_entries(), intel_ir_io_apic_print_entries() and x86_io_apic_ops.print_entries() later. Folded a patch from Thomas to fix errors in printed pin attributes, http://www.spinics.net/lists/linux-tip-commits/msg26108.htmlSigned-off-by:
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Jiang Liu authored
To support legacy ISA IRQs, we need to preallocate irq_cfg structures for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA IRQs, so it's more friendly for the hierarchical irqdomain implementation. Signed-off-by:
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Jiang Liu authored
Implement required callbacks to prepare for enabling hierarchical irqdomains on IOAPICs. After the conversion we can remove quite some code from the old implementation. Signed-off-by:
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Jiang Liu authored
Introduce helper functions to manipulate struct irq_alloc_info for IOAPIC. Also add an extra parameter to IOAPIC interfaces to prepare for hierarchical irqdomain. Function mp_set_gsi_attr() will be removed once we have switched to hierarchical irqdomains. Signed-off-by:
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Jiang Liu authored
Now there's no user of pre_init_apic_IRQ0(), so remove it. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1428905519-23704-32-git-send-email-jiang.liu@linux.intel.comSigned-off-by:
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Jiang Liu authored
Correctly indent code in function sfi_parse_mtmr(). Signed-off-by:
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Thomas Gleixner authored
MID has no PIC, but depending on the platform it requires the abt_timer, which is connected to irq0. The timer is set up at late_time_init(). But, looking at the MID code it seems, that there is no reason to do so. The only code which might need the timer working is the TSC calibration code, but thats a non issue on MID as that is using its own empty calibration function. And check_timer() is not invoked either because MID has no PIC and therefor no legacy irqs. So if you look at intel_mid_time_init() then you'll see that in the ARAT case the timer setup is skipped already. So until the point where x86_init.timers.setup_percpu_clockev() is called for the boot cpu nothing really needs a timer on MID. According to the MID code the apbt horror is only used for moorestown. Medfield and later use the local apic timer without the apbt nonsense. The best thing we can do is to drop moorestown support and get rid of that apbt nonsense alltogether. I don't think anyone deeply cares about it not being supported from 3.18 on. The number of devices which sport a moorestown should be pretty limited and the only relevant use case of those is to act as a pocket heater with short battery life time. Its pretty pointless to update kernels on pocket heaters except for bragging reasons. If someone at Intel really thinks that we need to keep moorestown alive for other than documentary and sentimental reasons, then we can move the apbt setup to x86_init.timers.setup_percpu_clockev(). At that point the IOAPIC is setup already, so it should just work. Signed-off-by:
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Jiang Liu authored
Now there's no user of irq_remapping_print_chip() anymore, so remove it. Signed-off-by:
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Jiang Liu authored
Use common MSI interfaces instead of private implementations of the same functionality to simplify DMAR/HPET driver implementation. Signed-off-by:
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Jiang Liu authored
Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips, they will be used to replace duplicated code. Signed-off-by:
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Jiang Liu authored
Function irq_chip_compose_msi_msg() can achieve the same goal as msi_update_msg(), so remove msi_update_msg(). Signed-off-by:
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Jiang Liu authored
Simplify the way to deal with remapped MSI interrupts, so we can remove irq_chip.irq_print_chip later. We simply change the name when the setup detects that the parent domain is remapping. Signed-off-by:
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Jiang Liu authored
Some irq_chip names use underscore, others use hyphen. So normalize them to use hyphen as separator. Signed-off-by:
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Jiang Liu authored
Enhance UV code to support hierarchical irqdomain, it helps to make the architecture more clear. We construct hwirq based on mmr_blade and mmr_offset, but mmr_offset has type unsigned long, it may exceed the range of irq_hw_number_t. So help about the way to construct hwirq based on mmr_blade and mmr_offset is welcomed! Folded a patch from Dimitri Sivanich <sivanich@sgi.com> to fix a bug on UV platforms, please refer to: http://lkml.org/lkml/2014/12/16/351Signed-off-by:
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Jiang Liu authored
We have slightly changed the architecture interfaces to support htirq PCI driver. It's safe because currently Hypertransport interrupt is only enabled on x86 platforms. Signed-off-by:
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Jiang Liu authored
Enhance DMAR code to support hierarchical irqdomain, it helps to make the architecture more clear. Signed-off-by:
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Jiang Liu authored
Refine the interfaces to create IRQ for DMAR unit. It's a preparation for converting DMAR IRQ to hierarchical irqdomain on x86. It also moves dmar_alloc_hwirq()/dmar_free_hwirq() from irq_remapping.h to dmar.h. They are not irq_remapping specific. Signed-off-by:
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Jiang Liu authored
Now MSI interrupt has been converted to new hierarchical irqdomain interfaces, so remove legacy MSI related code and interfaces. Signed-off-by:
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Jiang Liu authored
Now MSI interrupt has been converted to new hierarchical irqdomain interfaces, so remove legacy MSI related code and interfaces. Signed-off-by:
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Jiang Liu authored
Now MSI interrupt has been converted to new hierarchical irqdomain interfaces, so remove legacy MSI related code. Signed-off-by:
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Jiang Liu authored
Now MSI interrupt has been converted to new hierarchical irqdomain interfaces, so remove legacy MSI related code. Signed-off-by:
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Jiang Liu authored
DMAR interrupt won't be remapped by interrupt remapping hardware, so directly call native_compose_msi_msg() for DMAR IRQ to compose MSI message data. This will help to simplify MSI code later. Signed-off-by:
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Jiang Liu authored
Enhance MSI code to support hierarchical irqdomains, it helps to make the architecture more clear. Signed-off-by:
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Jiang Liu authored
Signed-off-by:
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Jiang Liu authored
Signed-off-by:
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Jiang Liu authored
Enhance Intel interrupt remapping driver to support hierarchical irqdomains. Implement intel_ir_chip to support stacked irq_chip. Signed-off-by:
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Jiang Liu authored
Prepare for the conversion to hierarchical irqdomains by changing function prototypes. No functional changes. Signed-off-by:
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Jiang Liu authored
Introduce new interfaces for interrupt remapping drivers to support hierarchical irqdomains: 1) irq_remapping_get_ir_irq_domain(): get irqdomain associated with an interrupt remapping unit. IOAPIC/HPET drivers use this interface to get parent interrupt remapping irqdomain. 2) irq_remapping_get_irq_domain(): get irqdomain for an IRQ allocation. This is mainly used to support MSI irqdomain. We must build one MSI irqdomain for each interrupt remapping unit. MSI driver calls this interface to get MSI irqdomain associated with an IR irqdomain which manages the PCI devices. In a further step we will store the irqdomain pointer in the device struct to avoid this call in the irq allocation path. Architecture specific hooks: 1) arch_get_ir_parent_domain(): get parent irqdomain for IR irqdomain, which is x86_vector_domain on x86 platforms. 2) arch_create_msi_irq_domain(): create an MSI irqdomain associated with the interrupt remapping unit. We also add following callbacks into struct irq_remap_ops: struct irq_domain *(*get_ir_irq_domain)(struct irq_alloc_info *); struct irq_domain *(*get_irq_domain)(struct irq_alloc_info *); Once all clients of IR have been converted to the new hierarchical irqdomain interfaces, we will: 1) Remove set_ioapic_entry, set_affinity, free_irq, compose_msi_msg, msi_alloc_irq, msi_setup_irq, setup_hpet_msi from struct remap_osp 2) Remove setup_ioapic_remapped_entry, free_remapped_irq, compose_remapped_msi_msg, setup_hpet_msi_remapped, setup_remapped_irq. 3) Simplify x86_io_apic_ops and x86_msi. We can achieve a way clearer architecture with all these changes applied. Signed-off-by:
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Jiang Liu authored
Use new irqdomain interfaces to allocate/free IRQ for DMAR and interrupt remapping, so we can remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later. The private definitions of irq_alloc_hwirqs()/irq_free_hwirqs() are a temporary solution, they will be removed once we have converted the interrupt remapping driver to use irqdomain framework. Signed-off-by:
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Jiang Liu authored
Use new irqdomain interfaces to allocate/free IRQ for HTIRQ, so we can remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later. This patch changes the interfaces between arch independent PCI driver and arch specific code. Currently HT_IRQ is only enabled on x86, so it does not affect other architectures. Signed-off-by:
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Jiang Liu authored
Use new irqdomain interfaces to allocate/free IRQ, so we can remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later. Signed-off-by:
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Jiang Liu authored
Use new irqdomain interfaces to allocate/free IRQ for PCI MSI, so we can remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later. Signed-off-by:
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Jiang Liu authored
Use new irqdomain interfaces to allocate/free IRQ for HPET, so we can remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later. Signed-off-by:
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Jiang Liu authored
Abstract CPU local APIC as an interrupt controller and create an irqdomain for it to manage CPU interrupt vectors. It's the base to enable hierarchical irqdomains on x86 systems. The final irqdomain hierarchy will look like this: IOAPIC domain ----| MSI/MSI-x domain ----> [Interrupt Remapping domain] -> CPU vector domain HPET_IRQ domain ----| ^ | DMAR domain ----------------------------------------------| HT_IRQ domain ----------------------------------------------| Signed-off-by: -
Jiang Liu authored
Cache destination CPU APIC ID into struct irq_cfg when assigning vector for interrupt. Upper layer just needs to read the cached APIC ID instead of calling apic->cpu_mask_to_apicid_and(), it helps to hide APIC driver details from IOAPIC/HPET/MSI drivers.. Signed-off-by:
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- 20 Apr, 2015 4 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/ohad/remoteprocLinus Torvalds authored
Pull remoteproc update from Ohad Ben-Cohen: "Suman Anna is adding remoteproc support for processors not behind IOMMUs" * tag 'remoteproc-4.1-next' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad/remoteproc: remoteproc: add IOMMU hardware capability flag
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git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuildLinus Torvalds authored
Pull misc kbuild updates: "This is the remaining part of kbuild stuff for v4.1-rc1: - One wew coccinelle script and a clarification of the proposed fix in bugon.coccinelle - CONFIG_KERNEL_LZ4 support for extract-ikconfig" * 'misc' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild: scripts/coccinelle/misc/bugon.cocci: update bug_on conversion warning scripts/extract-ikconfig: Support LZ4-compressed images. irqf_oneshot.cocci: add check of devm_request_threaded_irq() -
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "I'd like to say these were a set of regressions for the recent merge window code. Unfortunately, they all predate the merge window code (stable cc'd). There are two fixes for data integrity (mostly only showing up on module removal), an mvsas crash with expander attached SATA devices which goes back to the dawn of the driver but is only just being picked up as sas expanders become a standard item in low end server hardware, an am53c974 one because the interrupt data isn't fully initialised before the line is and a megaraid_sas one because it uses smp_processor_id() to select MSI-X queues and that now triggers a WARN_ON()" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: mvsas: fix panic on expander attached SATA devices am53c974: Fix crash during modprobe megaraid_sas: use raw_smp_processor_id() sd: Fix missing ATO tag check sd: Unregister integrity profile
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git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linuxLinus Torvalds authored
Pull fbdev updates from Tomi Valkeinen: "Small fixes and improvements to various fbdev drivers" * tag 'fbdev-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (24 commits) omapdss: extend pm notifier to handle hibernation OMAPDSS: Correct video ports description file path in DT binding doc OMAPDSS: disable VT switch fbdev: sh_mobile_lcdc: Fix destruction of uninitialized mutex video: fbdev: sh_mobile_lcdcfb: Fix ROP3 sysfs attribute parsing fbdev: pm3fb: cleanup some confusing indenting hyperv: hyperv_fb: match wait_for_completion_timeout return type video: fbdev: use msecs_to_jiffies for time conversions fbdev: via/via_clock: fix sparse warning video: fbdev: make of_device_id array const fbdev: sm501fb: use memset_io OMAPDSS: workaround for MFLAG + NV12 issue OMAPDSS: Add support for MFLAG OMAPDSS: setup default fifo thresholds OMAPDSS: DISPC: lock access to DISPC_CONTROL & DISPC_CONFIG OMAPDSS: DISPC: fix div by zero issue in overlay scaling OMAPDSS: DISPC: change sync_pclk_edge default value OMAPDSS: change signal_level & signal_edge enum values OMAPDSS: DISPC: explicit handling for sync and de levels OMAPDSS: DISPC: remove OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES ...
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