- 11 Sep, 2018 36 commits
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Shaoyun Liu authored
Correct the definition based on vega20 register spec Signed-off-by:
Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Emily Deng authored
since we use PSP to program IH regs now Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Acked-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
Emily Deng <Emily.Deng@amd.com> Signed-off-by:
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Christian König authored
Otherwise we might run into a use after free during bulk move. Signed-off-by:
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Tao Zhou authored
Fix SDMA hang in prt mode, clear XNACK_WATERMARK in reg SDMA0_UTCL1_WATERMK to avoid the issue Affected ASICs: VEGA10 VEGA12 RV1 RV2 v2: add reg clear for SDMA1 Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Tested-by:
Yukun Li <yukun1.li@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Acked-by:
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Evan Quan authored
do_div expects the 1st argument in 64bit instead of 32bit. Drop the usage of do_div as it seems unnecessary. V2: drop usage of do_div completely Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
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Masanari Iida authored
This patch fixes following warnings. ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3011: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Function parameter or member 'adev' not described in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' Signed-off-by:
Masanari Iida <standby24x7@gmail.com> Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Felix Kuehling authored
The intent of two commits was lost in the last rebase: 810955ba drm/amdgpu: Fix acquiring VM on large-BAR systems b5d21aac drm/amdgpu: Don't use shadow BO for compute context This commit restores the original behaviour: * Don't set AMDGPU_GEM_CREATE_NO_CPU_ACCESS for page directories to allow them to be reused for compute VMs * Don't create shadow BOs for page tables in compute VMs v2: move more logic into amdgpu_vm_bo_param Signed-off-by:
Kent Russell <Kent.Russell@amd.com> Reviewed-by:
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Christian König authored
Enable the old AGP aperture to avoid GART mappings. v2: don't enable it for SRIOV Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Felix Kuehling authored
Only initialize KFD once by moving amdgpu_amdkfd_init from amdgpu_pci_probe to amdgpu_init. This fixes kernel oopses and hangs when booting multi-GPU systems. Also removed some vestiges of KFD being its own module. Signed-off-by:
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Jun Lei authored
Existing debug dump are all invariant, new “low 32-bit of address” dump is not invariant Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by:
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Chiawen Huang authored
[Why] There are same purpose transition events. [How] remove the redundant event log. Signed-off-by:
Chiawen Huang <chiawen.huang@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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David Francis authored
[Why] The extraneous call to amdgpu_pm_compute_clocks is deprecated. [How] Remove it. Signed-off-by:
David Francis <David.Francis@amd.com> Signed-off-by:
Leo Li <sunpeng.li@amd.com> Reviewed-by:
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Eric Yang authored
[Why] Virtual sink is used when set mode happens on a disconnected display to allow the mode set to proceed. This did not work with MST because the logic for acquiring stream encoder uses stream signal to determine the special handling is required, and stream signal is virtual instead of DP in this case. [How] Use link type to decide instead. Signed-off-by:
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Tony Cheng authored
Signed-off-by:
Steven Chiu <Steven.Chiu@amd.com> Acked-by:
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David Francis authored
[Why] The i2c and aux engines are similar, and should be placed next to eachother for readability [How] Reorder the elements of the resource_pool struct Signed-off-by:
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Leo Li authored
[Why] Our implementation is functionally identical to DRM's Note that instead of checking if the provided id is 0, the helper follows through with the mode object search. However, It will still return NULL, since 0 is not a valid object id, and missed searches will return NULL. [How] Remove our implementation, and replace it with drm_atomic_helper_best_encoder. Signed-off-by:
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Hersen Wu authored
[why] AMD Stoney reference board, there are only 2 pipes (not include underlay), and 3 connectors. resource creation, only 2 I2C/AUX engines are created. Within dc_link_aux_transfer, when pin_data_en =2, refer to enengines[ddc_pin->pin_data->en] = NULL. NULL point is referred later causing system crash. [how] each asic design has fixed number of ddc engines at hw side. for each ddc engine, create its i2x/aux engine at sw side. Signed-off-by:
Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
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Chiawen Huang authored
[Why] Enhance aux transition debugging information. [How] Added Aux request and reply event log. Signed-off-by:
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Derek Lai authored
Some display need disconnect delay. Adding this parameter for future use Signed-off-by:
Derek Lai <Derek.Lai@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Jun Lei authored
Although 4 unique register values exist for gamma modes, two are actually the same (the two RAMs) It’s not possible for caller to understand this HW specific behavior, so some parsing is necessary in driver Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by:
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Gary Kattan authored
[Why]Update Code to get DTN golden log check to pass for tests run after DAL217 tests. [How]Change how dcn10_log_hw_state function prints HW state info (CM_GAMUT_REMAP_Cx_Cx registers) when GAMUT REMAP is in bypass mode. Signed-off-by:
Gary Kattan <gary.kattan@amd.com> Reviewed-by:
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Eric Bernstein authored
[Why] For supporting DP YCbCr 4:2:0 output. [How] Update mod_build_vsc_infopacket to support Pixel Encoding/Colorimetry Format indication for VSC SDP rev5. Signed-off-by:
Eric Bernstein <eric.bernstein@amd.com> Reviewed-by:
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Bhawanpreet Lakha authored
[Why] We currently lock modeset by setting a boolean in dm. We want to lock Based on what DC tells us. [How] Build stream_updates and plane_update based on what changed. Then we call check_update_surfaces_for_stream() to get the update type We lock only if update_type is not fast Signed-off-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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Tony Cheng authored
Signed-off-by:
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Christian König authored
Otherwise we won't be able to use the AGP aperture. Signed-off-by:
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Christian König authored
Start to use the old AGP aperture for system memory access. v2: Move that to amdgpu_ttm_alloc_gart Signed-off-by:
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Christian König authored
Helper to figure out the location of the AGP BAR. v2: fix a couple of bugs v3: correctly add one to vram_end Signed-off-by:
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Christian König authored
Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by:
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Christian König authored
Since we have a lot of FAQ on the VM state machine try to improve the documentation by adding functions for each state move. v2: fix typo in amdgpu_vm_bo_invalidated, use amdgpu_vm_bo_relocated in one more place as well. Signed-off-by: -
Christian König authored
Avoid unlocking a lock we never locked. Signed-off-by:
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Christian König authored
Allows us to avoid taking the spinlock in more places. Signed-off-by:
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Christian König authored
amdgpu_vm_bo_* functions should come much later. Signed-off-by:
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Evan Quan authored
For under voltage, negative value will be applied to voltage offset. Update the data type to cover this case. Signed-off-by:
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Evan Quan authored
Added vega20 overdrive support based on existing OD sysfs APIs. However, the OD logics are simplified on vega20. So, the behavior will be a little different and works only on some limited levels. V2: fix typo fix commit description revise error logs add support for clock OD V3: separate clock from voltage OD settings Signed-off-by:
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- 02 Sep, 2018 4 commits
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Alex Deucher authored
Vega20 does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on vega20. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Acked-by:
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Alex Deucher authored
vega12 does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on vega12. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Acked-by:
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Alex Deucher authored
Raven does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on Raven. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=106639Reviewed-by:
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Alex Deucher authored
No functional change, just rework it in order to adjust the behavior on a per asic level. The problem is that on vega10, something corrupts the lower 8 MB of vram on the second resume from S3. This does not seem to affect Raven, other gmc9 based asics need testing. Reviewed-by:
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