1. 05 Oct, 2008 2 commits
  2. 03 Oct, 2008 3 commits
  3. 01 Oct, 2008 1 commit
    • Yinghai Lu's avatar
      x86: change MTRR_SANITIZER to def_bool y · 2ffb3501
      Yinghai Lu authored
      This option has been added in v2.6.26 as a default-disabled
      feature and went through several revisions since then.
      
      The feature fixes a wide range of MTRR setup problems that BIOSes
      leave us with: slow system, slow Xorg, slow system when adding lots
      of RAM, etc., so we want to enable it by default for v2.6.28.
      
      See:
      
        [Bug 10508] Upgrade to 4GB of RAM messes up MTRRs
        http://bugzilla.kernel.org/show_bug.cgi?id=10508
      
      and the test results in:
      
         http://lkml.org/lkml/2008/9/29/273
      
      1. hpa
      reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
      reg01: base=0x13c000000 (5056MB), size=  64MB: uncachable, count=1
      reg02: base=0x00000000 (   0MB), size=4096MB: write-back, count=1
      reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
      reg04: base=0xbf700000 (3063MB), size=   1MB: uncachable, count=1
      reg05: base=0xbf800000 (3064MB), size=   8MB: uncachable, count=1
      
      will get
      Found optimal setting for mtrr clean up
      gran_size: 1M   chunk_size: 128M        num_reg: 6      lose RAM: 0M
      range0: 0000000000000000 - 00000000c0000000
      Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
      Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
      hole: 00000000bf700000 - 00000000c0000000
      Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
      Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
      range0: 0000000100000000 - 0000000140000000
      Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
      hole: 000000013c000000 - 0000000140000000
      Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC
      
      2. Dylan Taft
      reg00: base=0x00000000 (   0MB), size=4096MB: write-back, count=1
      reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
      reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1
      reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
      reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
      reg05: base=0xc7e00000 (3198MB), size=   2MB: uncachable, count=1
      reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1
      
      will get
      Found optimal setting for mtrr clean up
      gran_size: 1M   chunk_size: 4M  num_reg: 6      lose RAM: 0M
      range0: 0000000000000000 - 00000000c8000000
      Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
      Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
      Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
      hole: 00000000c7e00000 - 00000000c8000000
      Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC
      rangeX: 0000000100000000 - 0000000130000000
      Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
      Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
      
      3. Gabriel
      reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
      reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
      reg02: base=0x00000000 (   0MB), size=4096MB: write-back, count=1
      reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
      reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
      reg05: base=0x128000000 (4736MB), size=  64MB: write-back, count=1
      reg06: base=0xcf600000 (3318MB), size=   2MB: uncachable, count=1
      
      will get
      Found optimal setting for mtrr clean up
      gran_size: 1M   chunk_size: 16M         num_reg: 7      lose RAM: 0M
      range0: 0000000000000000 - 00000000d0000000
      Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
      Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
      Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
      hole: 00000000cf600000 - 00000000cf800000
      Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC
      rangeX: 0000000100000000 - 000000012c000000
      Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
      Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB
      Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB
      
      4. Mika Fischer
      reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
      reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
      reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
      reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
      reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
      
      will get
      Found optimal setting for mtrr clean up
      gran_size: 1M   chunk_size: 16M         num_reg: 5      lose RAM: 0M
      range0: 0000000000000000 - 00000000c0000000
      Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
      Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
      hole: 00000000bf700000 - 00000000c0000000
      Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
      Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
      rangeX: 0000000100000000 - 0000000140000000
      Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
      Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      2ffb3501
  4. 30 Sep, 2008 3 commits
    • Yinghai Lu's avatar
      x86: mtrr_cleanup try gran_size to less than 1M · 46240657
      Yinghai Lu authored
      one have gran < 1M
      
      reg00: base=0xd8000000 (3456MB), size= 128MB: uncachable, count=1
      reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
      reg02: base=0x00000000 (   0MB), size=4096MB: write-back, count=1
      reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
      reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
      reg05: base=0xd7f80000 (3455MB), size= 512KB: uncachable, count=1
      
      will get
      
      Found optimal setting for mtrr clean up
      gran_size: 512K         chunk_size: 2M  num_reg: 7      lose RAM: 0G
      range0: 0000000000000000 - 00000000d8000000
      Setting variable MTRR 0, base: 0GB, range: 2GB, type WB
      Setting variable MTRR 1, base: 2GB, range: 1GB, type WB
      Setting variable MTRR 2, base: 3GB, range: 256MB, type WB
      Setting variable MTRR 3, base: 3328MB, range: 128MB, type WB
      hole: 00000000d7f00000 - 00000000d7f80000
      Setting variable MTRR 4, base: 3455MB, range: 512KB, type UC
      rangeX: 0000000100000000 - 0000000128000000
      Setting variable MTRR 5, base: 4GB, range: 512MB, type WB
      Setting variable MTRR 6, base: 4608MB, range: 128MB, type WB
      
      so start from 64k instead of 1M
      Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      46240657
    • Yinghai Lu's avatar
      x86: mtrr_cleanup prepare to make gran_size to less 1M · dd7e5222
      Yinghai Lu authored
      make the print out right with size < 1M
      Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      dd7e5222
    • Yinghai Lu's avatar
      x86: mtrr_cleanup safe to get more spare regs now · 73436a1d
      Yinghai Lu authored
      Delay exit to make sure we can actually get the optimal result in as
      many cases as possible.
      Signed-off-by: default avatarYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      73436a1d
  5. 28 Sep, 2008 1 commit
  6. 27 Sep, 2008 3 commits
  7. 25 Sep, 2008 1 commit
  8. 24 Sep, 2008 22 commits
  9. 23 Sep, 2008 4 commits
    • Jack Tan's avatar
      [MIPS] Fixe the definition of PTRS_PER_PGD · 5291925a
      Jack Tan authored
      When we use > 4KB's page size the original definition is not consistent
      with PGDIR_SIZE. For exeample, if we use 16KB page size the PGDIR_SHIFT is
      (14-2) + 14 = 26, PGDIR_SIZE is 2^26,so the PTRS_PER_PGD should be:
      
      	2^32/2^26 = 2^6
      
      but the original definition of PTRS_PER_PGD is 4096 (PGDIR_ORDER = 0).
      
      So, this definition needs to be consistent with the PGDIR_SIZE.
      
      And the new definition is consistent with the PGD init in pagetable_init().
      Signed-off-by: default avatarDajie Tan <jiankemeng@gmail.com>
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      5291925a
    • Bruno Randolf's avatar
      [MIPS] au1000: Fix gpio direction · 44ce1719
      Bruno Randolf authored
      When setting the direction of one GPIO pin we have to keep the state of the
      other pins, hence use binary OR. Also gpio_direction_output() wants to set an
      initial value, so add that too.
      
      This fixes a problem with the USB power switch on mtx-1 boards.
      Signed-off-by: default avatarBruno Randolf <br1@einfach.org>
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      44ce1719
    • Linus Torvalds's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6 · fb478da5
      Linus Torvalds authored
      * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (23 commits)
        USB: revert recovery from transient errors
        usb: unusual devs patch for Nokia 5310 Music Xpress
        usb: ftdi_sio: add support for Domintell devices
        USB: drivers/usb/musb/: disable it on SuperH
        USB Serial: Sierra: Add MC8785 VID/PID
        USB: serial: add ZTE CDMA Tech id to option driver
        USB: ftdi_sio: Add 0x5050/0x0900 USB IDs (Papouch Quido USB 4/4)
        usb serial: ti_usb_3410_5052 obviously broken by firmware changes
        USB: fsl_usb2_udc: fix VDBG() format string
        USB: unusual_devs addition for RockChip MP3 player
        USB: SERIAL CP2101 add device IDs
        usb-serial: Add Siemens EF81 to PL-2303 hack triggers
        USB: fix EHCI periodic transfers
        usb: musb: fix include path
        USB: Fixing Nokia 3310c in storage mode
        usb gadget: fix omap_udc DMA regression
        USB: update of Documentation/usb/anchors.txt
        USB: fix hcd interrupt disabling
        USB: Correct Sierra Wireless USB EVDO Modem Device ID
        USB: Fix the Nokia 6300 storage-mode.
        ...
      fb478da5
    • Linus Torvalds's avatar
      Merge branch 'timers-fixes-for-linus' of... · 8553f321
      Linus Torvalds authored
      Merge branch 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
      
      * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
        timers: fix build error in !oneshot case
        x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC
        x86: prevent C-states hang on AMD C1E enabled machines
        clockevents: prevent mode mismatch on cpu online
        clockevents: check broadcast device not tick device
        clockevents: prevent stale tick_next_period for onlining CPUs
        x86: prevent stale state of c1e_mask across CPU offline/online
        clockevents: prevent cpu online to interfere with nohz
      8553f321