- 15 May, 2018 40 commits
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Samuel Li authored
This fixes an issue introduced by change "allow framebuffer in GART memory as well" which could lead to a shared buffer ending up pinned in vram. Use GTT if it is included in the domain, otherwise return an error. Signed-off-by:
Samuel Li <Samuel.Li@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Samuel Li authored
It returns supported domains for display, and domains actually used are to be decided later when pinned. Signed-off-by:
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Huang Rui authored
Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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Huang Rui authored
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Huang Rui authored
We need enable CGPG and GFXOFF together. If only enable one of them, this system will get hang after startx (do draw command). So when gfxoff is disabled, it also need disable CGPG after that. Signed-off-by:
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
gfx_off_control is used to be called for sending enabling/disabling gfxoff message. Signed-off-by:
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
It will be used not only for powerplay but also on amdgpu part in future patches. So move it into amd_shared header file. Signed-off-by:
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Huang Rui authored
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Huang Rui authored
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Huang Rui authored
drm/amdgpu: revise init_rlc_save_restore_list behavior to support latest register_list_format/register_restore table RLC save/restore list will be used on CGPG and GFXOFF function, it loads two bin table of register_list_format/register_restore in RLC firmware. Signed-off-by:
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Huang Rui authored
Remove gfx_v9_0_enable_sck_slow_down_on_power_up/down and CP power gating enabling functions because they only need to be called on setting power gating behavior. We keep it in set_powergating callback to enable/disable PG in late_init. Signed-off-by:
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Huang Rui authored
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Huang Rui authored
RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by:
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Huang Rui authored
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Huang Rui authored
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Kenneth Feng authored
For the dummy ACG fuses,need to disable ACG, otherwise corruption will be caused. Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Christian König authored
Just note if a BO was imported/exported. Signed-off-by:
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Kenneth Feng authored
update vega12 smu interface. Signed-off-by:
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Junwei Zhang authored
v2: fix compiling warning Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Flora Cui authored
fix settings. Signed-off-by:
Flora Cui <Flora.Cui@amd.com> Reviewed-by:
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Rex Zhu authored
It is caused by 'commit d6c9a7dc86cd ("drm/amd/pp: Move common code to smu_helper.c")' Reviewed-by:Evan Quan <evan.quan@amd.com> Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Chunming Zhou authored
Otherwise, cpu stuck for 22s with kernel panic. Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
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Marek Olšák authored
There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
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Chunming Zhou authored
if domain is illegal, we should return error. v2: remove duplicated domain checking. Signed-off-by:
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Chunming Zhou authored
When GEM needs to fallback to GTT for VRAM BOs we still want the preferred domain to be untouched so that the BO has a cance to move back to VRAM in the future. Signed-off-by:
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Christian König authored
Turned out that this locks up some bare metal Vega10. v2: fix stupid typo Signed-off-by:
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Pixel Ding authored
Make sure main thread won't update last_sched fence when entity is cleanup. Fix a racing issue which is caused by putting last_sched fence twice. Running vulkaninfo in tight loop can produce this issue as seeing wild fence pointer. v2: squash in build fix (Christian) Signed-off-by:
Pixel Ding <Pixel.Ding@amd.com> Reviewed-by:
Monk Liu <Monk.Liu@amd.com> Signed-off-by:
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Pixel Ding authored
Fix the potential memleak since scheduler main thread always hold one last_sched fence. Signed-off-by:
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Alex Deucher authored
Useful for info gathering about what firmwares are in use in the driver. Reviewed-by:
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Rex Zhu authored
Make sure to update the MCLK and SCLK flags when setting the VDDC flags due to dependencies. Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
v2: check reserved vram size before allocate. Reviewed-by:
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Chunming Zhou authored
After that, we can easily add new parameter when need. v2: a) rebase. b) Initialize struct amdgpu_bo_param, future new member could only be used in some one case, but all member should have its own initial value. Signed-off-by:
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