- 25 Jul, 2016 4 commits
-
-
Brian Norris authored
The ChromeOS Embedded Controller can support controlling its attached PWMs via its host-command interface. The number of supported PWMs varies on a per-board basis, but we can autodetect this by checking the error codes, so we don't need an extra property for this. And because the EC only allows specifying the duty cycle and not the period, we don't specify the period via pwm-cells, and instead have only support for one cell -- to specify the index. Signed-off-by:
Brian Norris <briannorris@chromium.org> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Thierry Reding authored
-
Brian Norris authored
The EC_CMD_PWM_{GET,SET}_DUTY commands allow us to control a PWM that is attached to the EC, rather than the main host SoC. The API provides functionality-based (e.g., keyboard light, backlight) or index-based addressing of the PWM(s). Duty cycles are represented by a 16-bit value, where 0 maps to 0% duty cycle and U16_MAX maps to 100%. The period cannot be controlled. This command set is more generic than, e.g., EC_CMD_PWM_{GET,SET}_KEYBOARD_BACKLIGHT and could possibly used to replace it on future products. Let's update the command header to include the definitions. Signed-off-by:
Brian Norris <briannorris@chromium.org> Acked-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Tomeu Vizoso authored
So that callers of cros_ec_cmd_xfer() don't have to repeat boilerplate code when checking for errors from the EC side. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by:
Benson Leung <bleung@chromium.org> Signed-off-by:
Brian Norris <briannorris@chromium.org> Acked-by:
Lee Jones <lee.jones@linaro.org> Tested-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
- 11 Jul, 2016 27 commits
-
-
Thierry Reding authored
Use of_device_get_match_data() instead of an open-coded variant. Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Thierry Reding authored
Avoid an overly long line by moving a comment around, and remove a use of else-after-return. Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Guillermo Rodriguez authored
When disabling a PWM channel, the PWM clock was being stopped immediately after writing to PWM_DIS. As a result, the disabling of the PWM channel did not complete properly, and the PWM output might be left at the wrong level. Fix this by waiting for the channel to be effectively disabled (by checking the PWM_SR register) before disabling the clock. Signed-off-by:
Guillermo Rodriguez <guille.rodriguez@gmail.com> Acked-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Ulrich Hecht authored
Add device tree bindings for the PWM controller found on R-Car H3 SoCs. The controller is compatible with the one found in earlier generations of R-Car SoCs. Signed-off-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Simon Horman <horms+renesas@verge.net.au> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Ryo Kodama authored
Replace ARCH_RCAR_GEN{1,2} with ARCH_RENESAS in order to support R-Car Gen3. Signed-off-by:
Ryo Kodama <ryo.kodama.vz@renesas.com> Signed-off-by:
Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Signed-off-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Simon Horman <horms+renesas@verge.net.au> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Laxman Dewangan authored
Tegra186 has multiple PWM controllers with only one output instead of one controller with four outputs in earlier SoC generations. Add support for Tegra186 and detect the number of PWM outputs using device tree match data. Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by:
Alexandre Courbot <acourbot@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Laxman Dewangan authored
Tegra186 has 8 different PWM controllers and each controller has only one output. Earlier SoC generations have 4 PWM outputs per controller. Add a device tree compatible string for Tegra186 to be able to differentiate between the two. Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Hyong Bin Kim authored
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calculation when the PWM rate is low. Hence do all calculation on unsigned long long to avoid overflow. Signed-off-by:
Hyong Bin Kim <hyongbink@nvidia.com> Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Victor(Weiguo) Pan authored
To get 100 % duty cycle (always high), pulse width needs to be set to 256. Signed-off-by:
Victor(Weiguo) Pan <wpan@nvidia.com> Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Rohith Seelaboyina authored
Add reset control of the PWM controller to reset it before accessing the PWM register. Signed-off-by:
Rohith Seelaboyina <rseelaboyina@nvidia.com> Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Thierry Reding authored
The former is much longer to type and is ambiguous because the value stored in the field is not the (physical) base address of the memory- mapped I/O registers, but the virtual address of those registers as mapped through the MMU. Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Thierry Reding authored
Use single spaces to separate data type from field names in structure definitions. Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Thierry Reding authored
This macro is used to initialize the ->npwm field of the PWM chip. Use a literal instead and make all other places rely on ->npwm. Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Sylvain Lemieux authored
The PWM_PIN_LEVEL bit is leave unset by the kernel PWM driver. Prior to commit 08ee77b5, the PWM_PIN_LEVEL bit was always clear when the PWM was disable and a 0 logic level was apply to the output. According to the LPC32x0 User Manual [1], the default value for bit 30 (PWM_PIN_LEVEL) is 0. This change initialize the pin level to 0 (default value) and update the register value accordingly. [1] http://www.nxp.com/documents/user_manual/UM10326.pdfSigned-off-by:
Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Linus Walleij authored
This adds a driver for the PWM block found in chips of the STMPE 24xx series of multi-purpose I2C expanders. (I think STMPE means ST Microelectronics Multi-Purpose Expander.) This PWM was designed in accordance with Nokia specifications and is kind of weird and usually just switched between max and zero duty cycle. However it is indeed a PWM so it needs to live in the PWM subsystem. This PWM is mostly used for white LED backlight. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Linus Walleij authored
This adds fairly standard device tree bindings for the STMPE PWM found in STMPE24xx multi-purpose expanders. Cc: devicetree@vger.kernel.org Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Boris Brezillon authored
Implement the ->apply() function to add support for atomic update. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Brian Norris <briannorris@chromium.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Boris Brezillon authored
The current logic will disable the PWM clk even if the PWM was left enabled by the bootloader (because it's controlling a critical device like a regulator for example). Keep the PWM clk enabled if the PWM is enabled to avoid any glitches. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Boris Brezillon authored
Implement the ->get_state() function to expose initial state. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Boris Brezillon authored
The current implementation always round down the duty and period values, while it would be better to round them to the closest integer. These changes are needed in preparation of atomic update support to prevent a period/duty cycle drift when executing several times the 'pwm_get_state() / modify / pwm_apply_state()' sequence. Say you have an expected period of 3.333 us and a clk rate of 112.666667 MHz -- the clock frequency doesn't divide evenly, so the period (stashed in nanoseconds) shrinks when we convert to the register value and back, as follows: pwm_apply_state(): register = period * 112666667 / 1000000000; pwm_get_state(): period = register * 1000000000 / 112666667; or in other words: period = period * 112666667 / 1000000000 * 1000000000 / 112666667; which yields a sequence like: 3333 -> 3328 3328 -> 3319 3319 -> 3310 3310 -> 3301 3301 -> 3292 3292 -> ... (etc) ... With this patch, we'd see instead: period = div_round_closest(period * 112666667, 1000000000) * 1000000000 / 112666667; which yields a stable sequence: 3333 -> 3337 3337 -> 3337 3337 -> ... (etc) ... Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Brian Norris <briannorris@chromium.org> Tested-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Yendapally Reddy Dhananjaya Reddy authored
Add support for the PWM controller present in Broadcom's iProc family of SoCs. It has been tested on the Northstar+ bcm958625HR board. Signed-off-by:
Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> [thierry.reding@gmail.com: bunch of coding style fixes, cleanups] Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Yendapally Reddy Dhananjaya Reddy authored
Add a device tree binding for Broadcom iProc PWM controller. Signed-off-by:
Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Andy Shevchenko authored
There is no need to check each time if the clk_rate defined or not when we call pwm_lpss_config(). Move the check to ->probe() instead. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Andy Shevchenko authored
Intel Edison has 4 PWM channels on the die with the same IP as in Broxton. Enable it. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Mika Westerberg authored
If duty_ns is large enough multiplying it by 255 overflows and results wrong duty cycle value being programmed. For example with 10ms duty when period is 20ms (50%) we get 255 * 10000000 / 20000000 = -87 because 255 * 10000000 overlows int. Whereas correct value should be 255 * 10000000 / 20000000 = 127 Fix this by using unsigned long long as type for on_time_div and changing integer literals to use proper type annotation. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Dan O'Donovan authored
The base_unit calculation applies an offset of 0x2 which adds significant error for lower frequencies and doesn't appear to be warranted - rounding the division result gives a correct value. Also, the upper limit check for base_unit is off-by-one; the upper nibble of base_unit is invalid if >=128 according to the Table 88 in the Z8000 Processor Series Datasheet Volume 1 (Rev. 2). Verified on UP Board (Cherry Trail) and Minnowboard Max (Bay Trail). Signed-off-by:
Dan O'Donovan <dan@emutex.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Cooper Jr., Franklin authored
The PWMSS local clock gating registers have no real purpose on OMAP ARM devices. These registers were left over registers from DSP IP where the PRCM doesn't exist. There is a silicon bug where gating and ungating clocks don't function properly. TRMs will be update to indicate that these registers shouldn't be touched. Therefore, all code that accesses the PWMSS_CLKCONFIG or PWMSS_CLKSTATUS will be removed by this patch with zero loss of functionality by the ECAP and EPWM drivers. Signed-off-by:
Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
- 08 Jul, 2016 2 commits
-
-
Cooper Jr., Franklin authored
When using the old eCAP and ePWM bindings for AM335x and AM437x the clock can be retrieved from the PWMSS parent. Newer bindings will insure that this clock is provided via device tree. Therefore, update this driver to support the newer and older bindings. In the case of the older binding being used give a warning. Signed-off-by:
Franklin S Cooper Jr <fcooper@ti.com> [thierry.reding@gmail.com: rewrite slightly for readability] Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
Cooper Jr., Franklin authored
Now that the node name has been changed from ehrpwm to pwm the document should show this proper usage. Also change the unit address in the example from 0 to the proper physical address value that should be used. Signed-off-by:
Franklin S Cooper Jr <fcooper@ti.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Thierry Reding <thierry.reding@gmail.com>
-
- 29 May, 2016 3 commits
-
-
Linus Torvalds authored
-
George Spelvin authored
The self-test was updated to cover zero-length strings; the function needs to be updated, too. Reported-by:
Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by:
George Spelvin <linux@sciencehorizons.net> Fixes: fcfd2fbf ("fs/namei.c: Add hashlen_string() function") Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
George Spelvin authored
The original name was simply hash_string(), but that conflicted with a function with that name in drivers/base/power/trace.c, and I decided that calling it "hashlen_" was better anyway. But you have to do it in two places. [ This caused build errors for architectures that don't define CONFIG_DCACHE_WORD_ACCESS - Linus ] Signed-off-by:
George Spelvin <linux@sciencehorizons.net> Reported-by:
Guenter Roeck <linux@roeck-us.net> Fixes: fcfd2fbf ("fs/namei.c: Add hashlen_string() function") Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
- 28 May, 2016 4 commits
-
-
Mikulas Patocka authored
The HPFS filesystem used generic_show_options to produce string that is displayed in /proc/mounts. However, there is a problem that the options may disappear after remount. If we mount the filesystem with option1 and then remount it with option2, /proc/mounts should show both option1 and option2, however it only shows option2 because the whole option string is replaced with replace_mount_options in hpfs_remount_fs. To fix this bug, implement the hpfs_show_options function that prints options that are currently selected. Signed-off-by:
Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
Mikulas Patocka authored
Commit c8f33d0b ("affs: kstrdup() memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: c8f33d0b ("affs: kstrdup() memory handling") Signed-off-by:
Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org # v4.1+ Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
Mikulas Patocka authored
Commit ce657611 ("hpfs: kstrdup() out of memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: ce657611 ("hpfs: kstrdup() out of memory handling") Signed-off-by:
Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds authored
Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
-